MC_SEQ_PMG_CMD_EMRS_LP 5829 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_EMRS_LP;
MC_SEQ_PMG_CMD_EMRS_LP 5910 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		*out_reg = MC_SEQ_PMG_CMD_EMRS_LP;
MC_SEQ_PMG_CMD_EMRS_LP 6003 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	WREG32(MC_SEQ_PMG_CMD_EMRS_LP, RREG32(MC_PMG_CMD_EMRS));
MC_SEQ_PMG_CMD_EMRS_LP 1886 drivers/gpu/drm/radeon/btc_dpm.c 		*out_reg = MC_SEQ_PMG_CMD_EMRS_LP >> 2;
MC_SEQ_PMG_CMD_EMRS_LP 1929 drivers/gpu/drm/radeon/btc_dpm.c 			table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_EMRS_LP >> 2;
MC_SEQ_PMG_CMD_EMRS_LP 2039 drivers/gpu/drm/radeon/btc_dpm.c 	WREG32(MC_SEQ_PMG_CMD_EMRS_LP, RREG32(MC_PMG_CMD_EMRS));
MC_SEQ_PMG_CMD_EMRS_LP 4350 drivers/gpu/drm/radeon/ci_dpm.c 			table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_EMRS_LP >> 2;
MC_SEQ_PMG_CMD_EMRS_LP 4455 drivers/gpu/drm/radeon/ci_dpm.c 		*out_reg = MC_SEQ_PMG_CMD_EMRS_LP >> 2;
MC_SEQ_PMG_CMD_EMRS_LP 4646 drivers/gpu/drm/radeon/ci_dpm.c 	WREG32(MC_SEQ_PMG_CMD_EMRS_LP, RREG32(MC_PMG_CMD_EMRS));
MC_SEQ_PMG_CMD_EMRS_LP 1004 drivers/gpu/drm/radeon/cypress_dpm.c 	eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_PMG_CMD_EMRS_LP >> 2;
MC_SEQ_PMG_CMD_EMRS_LP 2723 drivers/gpu/drm/radeon/ni_dpm.c 			table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_EMRS_LP >> 2;
MC_SEQ_PMG_CMD_EMRS_LP 2798 drivers/gpu/drm/radeon/ni_dpm.c 		*out_reg = MC_SEQ_PMG_CMD_EMRS_LP >> 2;
MC_SEQ_PMG_CMD_EMRS_LP 2887 drivers/gpu/drm/radeon/ni_dpm.c 	WREG32(MC_SEQ_PMG_CMD_EMRS_LP, RREG32(MC_PMG_CMD_EMRS));
MC_SEQ_PMG_CMD_EMRS_LP 5370 drivers/gpu/drm/radeon/si_dpm.c 			table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_EMRS_LP >> 2;
MC_SEQ_PMG_CMD_EMRS_LP 5456 drivers/gpu/drm/radeon/si_dpm.c 		*out_reg = MC_SEQ_PMG_CMD_EMRS_LP >> 2;
MC_SEQ_PMG_CMD_EMRS_LP 5549 drivers/gpu/drm/radeon/si_dpm.c 	WREG32(MC_SEQ_PMG_CMD_EMRS_LP, RREG32(MC_PMG_CMD_EMRS));