MC_PMG_CMD_MRS 5838 drivers/gpu/drm/amd/amdgpu/si_dpm.c temp_reg = RREG32(MC_PMG_CMD_MRS); MC_PMG_CMD_MRS 5839 drivers/gpu/drm/amd/amdgpu/si_dpm.c table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS; MC_PMG_CMD_MRS 5912 drivers/gpu/drm/amd/amdgpu/si_dpm.c case MC_PMG_CMD_MRS: MC_PMG_CMD_MRS 6004 drivers/gpu/drm/amd/amdgpu/si_dpm.c WREG32(MC_SEQ_PMG_CMD_MRS_LP, RREG32(MC_PMG_CMD_MRS)); MC_PMG_CMD_MRS 1888 drivers/gpu/drm/radeon/btc_dpm.c case MC_PMG_CMD_MRS >> 2: MC_PMG_CMD_MRS 1940 drivers/gpu/drm/radeon/btc_dpm.c tmp = RREG32(MC_PMG_CMD_MRS); MC_PMG_CMD_MRS 1941 drivers/gpu/drm/radeon/btc_dpm.c table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS >> 2; MC_PMG_CMD_MRS 2040 drivers/gpu/drm/radeon/btc_dpm.c WREG32(MC_SEQ_PMG_CMD_MRS_LP, RREG32(MC_PMG_CMD_MRS)); MC_PMG_CMD_MRS 4359 drivers/gpu/drm/radeon/ci_dpm.c temp_reg = RREG32(MC_PMG_CMD_MRS); MC_PMG_CMD_MRS 4360 drivers/gpu/drm/radeon/ci_dpm.c table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS >> 2; MC_PMG_CMD_MRS 4457 drivers/gpu/drm/radeon/ci_dpm.c case MC_PMG_CMD_MRS >> 2: MC_PMG_CMD_MRS 4647 drivers/gpu/drm/radeon/ci_dpm.c WREG32(MC_SEQ_PMG_CMD_MRS_LP, RREG32(MC_PMG_CMD_MRS)); MC_PMG_CMD_MRS 1009 drivers/gpu/drm/radeon/cypress_dpm.c eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_PMG_CMD_MRS >> 2; MC_PMG_CMD_MRS 2732 drivers/gpu/drm/radeon/ni_dpm.c temp_reg = RREG32(MC_PMG_CMD_MRS); MC_PMG_CMD_MRS 2733 drivers/gpu/drm/radeon/ni_dpm.c table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS >> 2; MC_PMG_CMD_MRS 2800 drivers/gpu/drm/radeon/ni_dpm.c case MC_PMG_CMD_MRS >> 2: MC_PMG_CMD_MRS 2888 drivers/gpu/drm/radeon/ni_dpm.c WREG32(MC_SEQ_PMG_CMD_MRS_LP, RREG32(MC_PMG_CMD_MRS)); MC_PMG_CMD_MRS 5379 drivers/gpu/drm/radeon/si_dpm.c temp_reg = RREG32(MC_PMG_CMD_MRS); MC_PMG_CMD_MRS 5380 drivers/gpu/drm/radeon/si_dpm.c table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS >> 2; MC_PMG_CMD_MRS 5458 drivers/gpu/drm/radeon/si_dpm.c case MC_PMG_CMD_MRS >> 2: MC_PMG_CMD_MRS 5550 drivers/gpu/drm/radeon/si_dpm.c WREG32(MC_SEQ_PMG_CMD_MRS_LP, RREG32(MC_PMG_CMD_MRS));