MC_PMG_CMD_EMRS 5827 drivers/gpu/drm/amd/amdgpu/si_dpm.c temp_reg = RREG32(MC_PMG_CMD_EMRS); MC_PMG_CMD_EMRS 5828 drivers/gpu/drm/amd/amdgpu/si_dpm.c table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS; MC_PMG_CMD_EMRS 5909 drivers/gpu/drm/amd/amdgpu/si_dpm.c case MC_PMG_CMD_EMRS: MC_PMG_CMD_EMRS 6003 drivers/gpu/drm/amd/amdgpu/si_dpm.c WREG32(MC_SEQ_PMG_CMD_EMRS_LP, RREG32(MC_PMG_CMD_EMRS)); MC_PMG_CMD_EMRS 1885 drivers/gpu/drm/radeon/btc_dpm.c case MC_PMG_CMD_EMRS >> 2: MC_PMG_CMD_EMRS 1927 drivers/gpu/drm/radeon/btc_dpm.c tmp = RREG32(MC_PMG_CMD_EMRS); MC_PMG_CMD_EMRS 1928 drivers/gpu/drm/radeon/btc_dpm.c table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2; MC_PMG_CMD_EMRS 2039 drivers/gpu/drm/radeon/btc_dpm.c WREG32(MC_SEQ_PMG_CMD_EMRS_LP, RREG32(MC_PMG_CMD_EMRS)); MC_PMG_CMD_EMRS 4348 drivers/gpu/drm/radeon/ci_dpm.c temp_reg = RREG32(MC_PMG_CMD_EMRS); MC_PMG_CMD_EMRS 4349 drivers/gpu/drm/radeon/ci_dpm.c table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2; MC_PMG_CMD_EMRS 4454 drivers/gpu/drm/radeon/ci_dpm.c case MC_PMG_CMD_EMRS >> 2: MC_PMG_CMD_EMRS 4646 drivers/gpu/drm/radeon/ci_dpm.c WREG32(MC_SEQ_PMG_CMD_EMRS_LP, RREG32(MC_PMG_CMD_EMRS)); MC_PMG_CMD_EMRS 1005 drivers/gpu/drm/radeon/cypress_dpm.c eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_PMG_CMD_EMRS >> 2; MC_PMG_CMD_EMRS 2721 drivers/gpu/drm/radeon/ni_dpm.c temp_reg = RREG32(MC_PMG_CMD_EMRS); MC_PMG_CMD_EMRS 2722 drivers/gpu/drm/radeon/ni_dpm.c table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2; MC_PMG_CMD_EMRS 2797 drivers/gpu/drm/radeon/ni_dpm.c case MC_PMG_CMD_EMRS >> 2: MC_PMG_CMD_EMRS 2887 drivers/gpu/drm/radeon/ni_dpm.c WREG32(MC_SEQ_PMG_CMD_EMRS_LP, RREG32(MC_PMG_CMD_EMRS)); MC_PMG_CMD_EMRS 5368 drivers/gpu/drm/radeon/si_dpm.c temp_reg = RREG32(MC_PMG_CMD_EMRS); MC_PMG_CMD_EMRS 5369 drivers/gpu/drm/radeon/si_dpm.c table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2; MC_PMG_CMD_EMRS 5455 drivers/gpu/drm/radeon/si_dpm.c case MC_PMG_CMD_EMRS >> 2: MC_PMG_CMD_EMRS 5549 drivers/gpu/drm/radeon/si_dpm.c WREG32(MC_SEQ_PMG_CMD_EMRS_LP, RREG32(MC_PMG_CMD_EMRS));