MCLK_PWRMGT_CNTL 4039 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_pi->clock_registers.mclk_pwrmgt_cntl = RREG32(MCLK_PWRMGT_CNTL); MCLK_PWRMGT_CNTL 1096 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c MCLK_PWRMGT_CNTL, DLL_SPEED, mpll_param.dll_speed); MCLK_PWRMGT_CNTL 1098 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c MCLK_PWRMGT_CNTL, MRDCK0_PDNB, dllStateOn); MCLK_PWRMGT_CNTL 1100 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c MCLK_PWRMGT_CNTL, MRDCK1_PDNB, dllStateOn); MCLK_PWRMGT_CNTL 1464 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c MCLK_PWRMGT_CNTL, MRDCK0_RESET, 0x1); MCLK_PWRMGT_CNTL 1466 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c MCLK_PWRMGT_CNTL, MRDCK1_RESET, 0x1); MCLK_PWRMGT_CNTL 1470 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c MCLK_PWRMGT_CNTL, MRDCK0_PDNB, 0); MCLK_PWRMGT_CNTL 1472 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c MCLK_PWRMGT_CNTL, MRDCK1_PDNB, 0); MCLK_PWRMGT_CNTL 1147 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c MCLK_PWRMGT_CNTL, DLL_SPEED, mpll_param.dll_speed); MCLK_PWRMGT_CNTL 1149 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c MCLK_PWRMGT_CNTL, MRDCK0_PDNB, dllStateOn); MCLK_PWRMGT_CNTL 1151 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c MCLK_PWRMGT_CNTL, MRDCK1_PDNB, dllStateOn); MCLK_PWRMGT_CNTL 1512 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c MCLK_PWRMGT_CNTL, MRDCK0_RESET, 0x1); MCLK_PWRMGT_CNTL 1514 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c MCLK_PWRMGT_CNTL, MRDCK1_RESET, 0x1); MCLK_PWRMGT_CNTL 1518 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c MCLK_PWRMGT_CNTL, MRDCK0_PDNB, 0); MCLK_PWRMGT_CNTL 1520 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c MCLK_PWRMGT_CNTL, MRDCK1_PDNB, 0); MCLK_PWRMGT_CNTL 899 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c MCLK_PWRMGT_CNTL, DLL_SPEED, mpll_param.dll_speed); MCLK_PWRMGT_CNTL 901 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c MCLK_PWRMGT_CNTL, MRDCK0_PDNB, dllStateOn); MCLK_PWRMGT_CNTL 903 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c MCLK_PWRMGT_CNTL, MRDCK1_PDNB, dllStateOn); MCLK_PWRMGT_CNTL 1254 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c MCLK_PWRMGT_CNTL, MRDCK0_RESET, 0x1); MCLK_PWRMGT_CNTL 1256 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c MCLK_PWRMGT_CNTL, MRDCK1_RESET, 0x1); MCLK_PWRMGT_CNTL 1260 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c MCLK_PWRMGT_CNTL, MRDCK0_PDNB, 0); MCLK_PWRMGT_CNTL 1262 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c MCLK_PWRMGT_CNTL, MRDCK1_PDNB, 0); MCLK_PWRMGT_CNTL 1887 drivers/gpu/drm/radeon/ci_dpm.c pi->clock_registers.mclk_pwrmgt_cntl = RREG32(MCLK_PWRMGT_CNTL); MCLK_PWRMGT_CNTL 258 drivers/gpu/drm/radeon/cypress_dpm.c WREG32_P(MCLK_PWRMGT_CNTL, 0, ~MPLL_PWRMGT_OFF); MCLK_PWRMGT_CNTL 260 drivers/gpu/drm/radeon/cypress_dpm.c WREG32_P(MCLK_PWRMGT_CNTL, MPLL_PWRMGT_OFF, ~MPLL_PWRMGT_OFF); MCLK_PWRMGT_CNTL 1195 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->clock_registers.mclk_pwrmgt_cntl = RREG32(MCLK_PWRMGT_CNTL); MCLK_PWRMGT_CNTL 314 drivers/gpu/drm/radeon/r600_dpm.c WREG32_P(MCLK_PWRMGT_CNTL, 0, ~MPLL_PWRMGT_OFF); MCLK_PWRMGT_CNTL 316 drivers/gpu/drm/radeon/r600_dpm.c WREG32_P(MCLK_PWRMGT_CNTL, MPLL_PWRMGT_OFF, ~MPLL_PWRMGT_OFF); MCLK_PWRMGT_CNTL 991 drivers/gpu/drm/radeon/rv6xx_dpm.c WREG32_P(MCLK_PWRMGT_CNTL, USE_DISPLAY_GAP, ~USE_DISPLAY_GAP); MCLK_PWRMGT_CNTL 993 drivers/gpu/drm/radeon/rv6xx_dpm.c WREG32_P(MCLK_PWRMGT_CNTL, 0, ~USE_DISPLAY_GAP); MCLK_PWRMGT_CNTL 308 drivers/gpu/drm/radeon/rv740_dpm.c RREG32(MCLK_PWRMGT_CNTL); MCLK_PWRMGT_CNTL 183 drivers/gpu/drm/radeon/rv770_dpm.c WREG32_P(MCLK_PWRMGT_CNTL, 0, ~MPLL_PWRMGT_OFF); MCLK_PWRMGT_CNTL 201 drivers/gpu/drm/radeon/rv770_dpm.c WREG32_P(MCLK_PWRMGT_CNTL, MPLL_PWRMGT_OFF, ~MPLL_PWRMGT_OFF); MCLK_PWRMGT_CNTL 1539 drivers/gpu/drm/radeon/rv770_dpm.c RREG32(MCLK_PWRMGT_CNTL); MCLK_PWRMGT_CNTL 3579 drivers/gpu/drm/radeon/si_dpm.c si_pi->clock_registers.mclk_pwrmgt_cntl = RREG32(MCLK_PWRMGT_CNTL);