MCFSIM_ICR4        70 arch/m68k/coldfire/intc-5272.c 	/*MCF_IRQ_QSPI*/	{ .icr = MCFSIM_ICR4, .index = 28, .ack = 0, },
MCFSIM_ICR4        71 arch/m68k/coldfire/intc-5272.c 	/*MCF_IRQ_EINT5*/	{ .icr = MCFSIM_ICR4, .index = 24, .ack = 1, },
MCFSIM_ICR4        72 arch/m68k/coldfire/intc-5272.c 	/*MCF_IRQ_EINT6*/	{ .icr = MCFSIM_ICR4, .index = 20, .ack = 1, },
MCFSIM_ICR4        73 arch/m68k/coldfire/intc-5272.c 	/*MCF_IRQ_SWTO*/	{ .icr = MCFSIM_ICR4, .index = 16, .ack = 0, },
MCFSIM_ICR4       169 arch/m68k/coldfire/intc-5272.c 	writel(0x88888888, MCFSIM_ICR4);
MCFSIM_ICR4       148 arch/m68k/include/asm/m525xsim.h #define MCFSIM_UART1ICR		MCFSIM_ICR4	/* UART 1 ICR */
MCFSIM_ICR4       153 arch/m68k/include/asm/m5307sim.h #define	MCFSIM_UART1ICR		MCFSIM_ICR4	/* UART 1 ICR */
MCFSIM_ICR4        70 arch/m68k/include/asm/m53xxsim.h #define	MCFSIM_UART1ICR		MCFSIM_ICR4	/* UART 1 ICR */
MCFSIM_ICR4       117 arch/m68k/include/asm/m5407sim.h #define	MCFSIM_UART1ICR		MCFSIM_ICR4	/* UART 1 ICR */