MCFICM_INTC0       57 arch/m68k/coldfire/intc-2.c 	imraddr = (irq & 0x40) ? MCFICM_INTC1 : MCFICM_INTC0;
MCFICM_INTC0       59 arch/m68k/coldfire/intc-2.c 	imraddr = MCFICM_INTC0;
MCFICM_INTC0       75 arch/m68k/coldfire/intc-2.c 	imraddr = (irq & 0x40) ? MCFICM_INTC1 : MCFICM_INTC0;
MCFICM_INTC0       77 arch/m68k/coldfire/intc-2.c 	imraddr = MCFICM_INTC0;
MCFICM_INTC0      118 arch/m68k/coldfire/intc-2.c 	icraddr = (irq & 0x40) ? MCFICM_INTC1 : MCFICM_INTC0;
MCFICM_INTC0      120 arch/m68k/coldfire/intc-2.c 	icraddr = MCFICM_INTC0;
MCFICM_INTC0      198 arch/m68k/coldfire/intc-2.c 	__raw_writel(0x1, MCFICM_INTC0 + MCFINTC_IMRL);
MCFICM_INTC0       40 arch/m68k/include/asm/m520xsim.h #define MCFINTC0_SIMR       (MCFICM_INTC0 + MCFINTC_SIMR)
MCFICM_INTC0       41 arch/m68k/include/asm/m520xsim.h #define MCFINTC0_CIMR       (MCFICM_INTC0 + MCFINTC_CIMR)
MCFICM_INTC0       42 arch/m68k/include/asm/m520xsim.h #define	MCFINTC0_ICR0       (MCFICM_INTC0 + MCFINTC_ICR0)