ARRAY_1D_TILED_THIN1 1990 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 	} else if (AMDGPU_TILING_GET(tiling_flags, ARRAY_MODE) == ARRAY_1D_TILED_THIN1) {
ARRAY_1D_TILED_THIN1 1992 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 					  ARRAY_1D_TILED_THIN1);
ARRAY_1D_TILED_THIN1 2032 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 	} else if (AMDGPU_TILING_GET(tiling_flags, ARRAY_MODE) == ARRAY_1D_TILED_THIN1) {
ARRAY_1D_TILED_THIN1 2034 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 					  ARRAY_1D_TILED_THIN1);
ARRAY_1D_TILED_THIN1 1932 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 	} else if (AMDGPU_TILING_GET(tiling_flags, ARRAY_MODE) == ARRAY_1D_TILED_THIN1) {
ARRAY_1D_TILED_THIN1 1907 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 	} else if (AMDGPU_TILING_GET(tiling_flags, ARRAY_MODE) == ARRAY_1D_TILED_THIN1) {
ARRAY_1D_TILED_THIN1  452 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 				ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1  480 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 				ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1  507 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 				ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1  676 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 				ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1  716 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 				ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1  748 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 				ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1  882 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 				ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1  910 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 				ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1  937 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 				ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 1106 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 				ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 1134 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 				ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 1161 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 				ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 1075 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		tile[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 1085 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 1097 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		tile[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 1145 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		tile[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 1242 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		tile[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 1256 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 1271 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		tile[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 1325 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		tile[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 1428 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		tile[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 1438 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 1450 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		tile[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 1498 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		tile[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2163 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2173 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2185 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2233 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2335 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2349 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2365 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2421 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2524 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2538 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2554 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2610 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2714 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2728 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2744 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2800 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2916 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2930 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2946 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 3002 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 3118 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 3128 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 3140 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 3188 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 3295 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 3305 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 3317 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 3365 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		modearray[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2390 drivers/gpu/drm/radeon/cik.c 		tile[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2403 drivers/gpu/drm/radeon/cik.c 		tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2418 drivers/gpu/drm/radeon/cik.c 		tile[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2433 drivers/gpu/drm/radeon/cik.c 		tile[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2533 drivers/gpu/drm/radeon/cik.c 		tile[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2546 drivers/gpu/drm/radeon/cik.c 		tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2561 drivers/gpu/drm/radeon/cik.c 		tile[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2576 drivers/gpu/drm/radeon/cik.c 		tile[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2677 drivers/gpu/drm/radeon/cik.c 		tile[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2690 drivers/gpu/drm/radeon/cik.c 		tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2705 drivers/gpu/drm/radeon/cik.c 		tile[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2720 drivers/gpu/drm/radeon/cik.c 		tile[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2757 drivers/gpu/drm/radeon/cik.c 		tile[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2770 drivers/gpu/drm/radeon/cik.c 		tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2785 drivers/gpu/drm/radeon/cik.c 		tile[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2800 drivers/gpu/drm/radeon/cik.c 		tile[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2901 drivers/gpu/drm/radeon/cik.c 		tile[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2914 drivers/gpu/drm/radeon/cik.c 		tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2929 drivers/gpu/drm/radeon/cik.c 		tile[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2944 drivers/gpu/drm/radeon/cik.c 		tile[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1   98 drivers/gpu/drm/radeon/evergreen_cs.c 		return ARRAY_1D_TILED_THIN1;
ARRAY_1D_TILED_THIN1  309 drivers/gpu/drm/radeon/evergreen_cs.c 	case ARRAY_1D_TILED_THIN1:
ARRAY_1D_TILED_THIN1  330 drivers/gpu/drm/radeon/evergreen_cs.c 	case ARRAY_1D_TILED_THIN1:
ARRAY_1D_TILED_THIN1  885 drivers/gpu/drm/radeon/evergreen_cs.c 				surf.mode = ARRAY_1D_TILED_THIN1;
ARRAY_1D_TILED_THIN1  892 drivers/gpu/drm/radeon/evergreen_cs.c 		case ARRAY_1D_TILED_THIN1:
ARRAY_1D_TILED_THIN1  276 drivers/gpu/drm/radeon/r600_cs.c 	case ARRAY_1D_TILED_THIN1:
ARRAY_1D_TILED_THIN1 2556 drivers/gpu/drm/radeon/si.c 		tile[4] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2601 drivers/gpu/drm/radeon/si.c 		tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2637 drivers/gpu/drm/radeon/si.c 		tile[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2771 drivers/gpu/drm/radeon/si.c 		tile[4] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2816 drivers/gpu/drm/radeon/si.c 		tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
ARRAY_1D_TILED_THIN1 2852 drivers/gpu/drm/radeon/si.c 		tile[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |