ARM_cpsr 50 arch/arm/include/asm/kexec.h [_ARM_cpsr] "=r" (newregs->ARM_cpsr), ARM_cpsr 137 arch/arm/include/asm/kvm_emulate.h return (unsigned long *)&vcpu->arch.ctxt.gp_regs.usr_regs.ARM_cpsr; ARM_cpsr 147 arch/arm/include/asm/kvm_emulate.h unsigned long cpsr_mode = vcpu->arch.ctxt.gp_regs.usr_regs.ARM_cpsr & MODE_MASK; ARM_cpsr 153 arch/arm/include/asm/kvm_emulate.h unsigned long cpsr_mode = vcpu->arch.ctxt.gp_regs.usr_regs.ARM_cpsr & MODE_MASK; ARM_cpsr 22 arch/arm/include/asm/perf_event.h (regs)->ARM_cpsr = SVC_MODE; \ ARM_cpsr 70 arch/arm/include/asm/processor.h regs->ARM_cpsr = USR_MODE; \ ARM_cpsr 72 arch/arm/include/asm/processor.h regs->ARM_cpsr = USR26_MODE; \ ARM_cpsr 74 arch/arm/include/asm/processor.h regs->ARM_cpsr |= PSR_T_BIT; \ ARM_cpsr 75 arch/arm/include/asm/processor.h regs->ARM_cpsr |= PSR_ENDSTATE; \ ARM_cpsr 28 arch/arm/include/asm/ptrace.h (((regs)->ARM_cpsr & 0xf) == 0) ARM_cpsr 32 arch/arm/include/asm/ptrace.h (((regs)->ARM_cpsr & PSR_T_BIT)) ARM_cpsr 39 arch/arm/include/asm/ptrace.h ((((regs)->ARM_cpsr & PSR_J_BIT) >> (__ffs(PSR_J_BIT) - 1)) | \ ARM_cpsr 40 arch/arm/include/asm/ptrace.h (((regs)->ARM_cpsr & PSR_T_BIT) >> (__ffs(PSR_T_BIT)))) ARM_cpsr 46 arch/arm/include/asm/ptrace.h ((regs)->ARM_cpsr & MODE_MASK) ARM_cpsr 49 arch/arm/include/asm/ptrace.h (!((regs)->ARM_cpsr & PSR_I_BIT)) ARM_cpsr 52 arch/arm/include/asm/ptrace.h (!((regs)->ARM_cpsr & PSR_F_BIT)) ARM_cpsr 60 arch/arm/include/asm/ptrace.h unsigned long mode = regs->ARM_cpsr & MODE_MASK; ARM_cpsr 65 arch/arm/include/asm/ptrace.h regs->ARM_cpsr &= ~(PSR_F_BIT | PSR_A_BIT); ARM_cpsr 67 arch/arm/include/asm/ptrace.h if ((regs->ARM_cpsr & PSR_I_BIT) == 0) { ARM_cpsr 77 arch/arm/include/asm/ptrace.h regs->ARM_cpsr &= PSR_f | PSR_s | PSR_x | PSR_T_BIT | MODE32_BIT; ARM_cpsr 79 arch/arm/include/asm/ptrace.h regs->ARM_cpsr |= USR_MODE; ARM_cpsr 17 arch/arm/include/asm/xen/events.h return raw_irqs_disabled_flags(regs->ARM_cpsr); ARM_cpsr 100 arch/arm/kernel/asm-offsets.c DEFINE(S_PSR, offsetof(struct pt_regs, ARM_cpsr)); ARM_cpsr 48 arch/arm/kernel/kgdb.c { "cpsr", 4, offsetof(struct pt_regs, ARM_cpsr)}, ARM_cpsr 123 arch/arm/kernel/process.c regs->ARM_pc, regs->ARM_lr, regs->ARM_cpsr); ARM_cpsr 136 arch/arm/kernel/process.c flags = regs->ARM_cpsr; ARM_cpsr 162 arch/arm/kernel/process.c printk("xPSR: %08lx\n", regs->ARM_cpsr); ARM_cpsr 254 arch/arm/kernel/process.c childregs->ARM_cpsr = SVC_MODE; ARM_cpsr 202 arch/arm/kernel/signal.c regs->ARM_cpsr = context.arm_cpsr; ARM_cpsr 311 arch/arm/kernel/signal.c .arm_cpsr = regs->ARM_cpsr, ARM_cpsr 369 arch/arm/kernel/signal.c unsigned long cpsr = regs->ARM_cpsr & ~(PSR_f | PSR_E_BIT); ARM_cpsr 482 arch/arm/kernel/signal.c regs->ARM_cpsr = cpsr; ARM_cpsr 166 arch/arm/kernel/swp_emulate.c res = arm_check_condition(instr, regs->ARM_cpsr); ARM_cpsr 429 arch/arm/kernel/traps.c (regs->ARM_cpsr & hook->cpsr_mask) == hook->cpsr_val) ARM_cpsr 629 arch/arm/kernel/traps.c regs->ARM_cpsr &= ~MODE32_BIT; ARM_cpsr 635 arch/arm/kernel/traps.c regs->ARM_cpsr |= MODE32_BIT; ARM_cpsr 77 arch/arm/kvm/guest.c if (off == KVM_REG_ARM_CORE_REG(usr_regs.ARM_cpsr)) { ARM_cpsr 22 arch/arm/kvm/hyp/banked-sr.c ctxt->gp_regs.usr_regs.ARM_cpsr = read_special(SPSR); ARM_cpsr 49 arch/arm/kvm/hyp/banked-sr.c write_special(ctxt->gp_regs.usr_regs.ARM_cpsr, SPSR_cxsf); ARM_cpsr 26 arch/arm/kvm/reset.c .usr_regs.ARM_cpsr = SVC_MODE | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT, ARM_cpsr 901 arch/arm/mm/alignment.c if (regs->ARM_cpsr & PSR_C_BIT) ARM_cpsr 17 arch/arm/mm/extable.c regs->ARM_cpsr &= ~PSR_IT_MASK; ARM_cpsr 73 arch/arm/probes/decode-arm.c regs->ARM_cpsr |= PSR_T_BIT; ARM_cpsr 86 arch/arm/probes/decode-arm.c regs->ARM_cpsr &= ~PSR_T_BIT; ARM_cpsr 88 arch/arm/probes/decode-arm.c regs->ARM_cpsr |= PSR_T_BIT; ARM_cpsr 96 arch/arm/probes/decode-arm.c regs->uregs[rd] = regs->ARM_cpsr & mask; ARM_cpsr 849 arch/arm/probes/decode-thumb.c regs->ARM_cpsr = it_advance(regs->ARM_cpsr); ARM_cpsr 858 arch/arm/probes/decode-thumb.c regs->ARM_cpsr = it_advance(regs->ARM_cpsr); ARM_cpsr 65 arch/arm/probes/decode.h long cpsr = regs->ARM_cpsr; ARM_cpsr 73 arch/arm/probes/decode.h regs->ARM_cpsr = cpsr; ARM_cpsr 170 arch/arm/probes/kprobes/actions-arm.c unsigned long cpsr = regs->ARM_cpsr; ARM_cpsr 186 arch/arm/probes/kprobes/actions-arm.c regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK); ARM_cpsr 200 arch/arm/probes/kprobes/actions-arm.c unsigned long cpsr = regs->ARM_cpsr; ARM_cpsr 213 arch/arm/probes/kprobes/actions-arm.c regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK); ARM_cpsr 230 arch/arm/probes/kprobes/actions-arm.c unsigned long cpsr = regs->ARM_cpsr; ARM_cpsr 243 arch/arm/probes/kprobes/actions-arm.c regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK); ARM_cpsr 280 arch/arm/probes/kprobes/actions-arm.c unsigned long cpsr = regs->ARM_cpsr; ARM_cpsr 294 arch/arm/probes/kprobes/actions-arm.c regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK); ARM_cpsr 49 arch/arm/probes/kprobes/actions-thumb.c regs->uregs[rd] = regs->ARM_cpsr & mask; ARM_cpsr 97 arch/arm/probes/kprobes/actions-thumb.c regs->ARM_cpsr &= ~PSR_T_BIT; ARM_cpsr 221 arch/arm/probes/kprobes/actions-thumb.c unsigned long cpsr = regs->ARM_cpsr; ARM_cpsr 234 arch/arm/probes/kprobes/actions-thumb.c regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK); ARM_cpsr 388 arch/arm/probes/kprobes/actions-thumb.c unsigned long cpsr = regs->ARM_cpsr; ARM_cpsr 392 arch/arm/probes/kprobes/actions-thumb.c regs->ARM_cpsr = cpsr; ARM_cpsr 445 arch/arm/probes/kprobes/actions-thumb.c unsigned long oldcpsr = regs->ARM_cpsr; ARM_cpsr 468 arch/arm/probes/kprobes/actions-thumb.c regs->ARM_cpsr = t16_emulate_loregs(insn, asi, regs); ARM_cpsr 477 arch/arm/probes/kprobes/actions-thumb.c regs->ARM_cpsr = cpsr; ARM_cpsr 490 arch/arm/probes/kprobes/actions-thumb.c unsigned long cpsr = regs->ARM_cpsr; ARM_cpsr 508 arch/arm/probes/kprobes/actions-thumb.c regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK); ARM_cpsr 211 arch/arm/probes/kprobes/core.c regs->ARM_cpsr = it_advance(regs->ARM_cpsr); ARM_cpsr 257 arch/arm/probes/kprobes/core.c if (!p->ainsn.insn_check_cc(regs->ARM_cpsr)) { ARM_cpsr 1122 arch/arm/probes/kprobes/test-core.c regs->ARM_cpsr &= ~(APSR_MASK | PSR_IT_MASK); ARM_cpsr 1123 arch/arm/probes/kprobes/test-core.c regs->ARM_cpsr |= test_context_cpsr(scenario); ARM_cpsr 1147 arch/arm/probes/kprobes/test-core.c regs->ARM_cpsr |= PSR_I_BIT; ARM_cpsr 1203 arch/arm/probes/kprobes/test-core.c initial_regs.ARM_cpsr &= ~PSR_IGNORE_BITS; ARM_cpsr 1224 arch/arm/probes/kprobes/test-core.c result_regs.ARM_cpsr &= ~PSR_IGNORE_BITS; ARM_cpsr 1235 arch/arm/probes/kprobes/test-core.c regs->ARM_cpsr &= ~PSR_I_BIT; ARM_cpsr 1276 arch/arm/probes/kprobes/test-core.c pr_err("cpsr %08lx\n", regs->ARM_cpsr); ARM_cpsr 38 arch/arm/probes/uprobes/core.c if (!auprobe->asi.insn_check_cc(regs->ARM_cpsr)) {