MAX_SMU_TABLE     123 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c 	PP_ASSERT_WITH_CODE(table_id < MAX_SMU_TABLE,
MAX_SMU_TABLE     154 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c 	PP_ASSERT_WITH_CODE(table_id < MAX_SMU_TABLE,
MAX_SMU_TABLE      42 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.h 	struct smu_table_entry entry[MAX_SMU_TABLE];
MAX_SMU_TABLE      44 drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c 	PP_ASSERT_WITH_CODE(table_id < MAX_SMU_TABLE,
MAX_SMU_TABLE      74 drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c 	PP_ASSERT_WITH_CODE(table_id < MAX_SMU_TABLE,
MAX_SMU_TABLE      38 drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.h 	struct smu_table_entry entry[MAX_SMU_TABLE];