MAX_PLL_DIV        42 drivers/clk/clk-qoriq.c 	struct clockgen_pll_div div[MAX_PLL_DIV];
MAX_PLL_DIV       578 drivers/clk/clk-stm32f4.c static const struct stm32f4_div_data  div_data[MAX_PLL_DIV] = {
MAX_PLL_DIV       587 drivers/clk/clk-stm32f4.c 	const char *div_name[MAX_PLL_DIV];
MAX_PLL_DIV       590 drivers/clk/clk-stm32f4.c static const struct stm32f4_pll_data stm32f429_pll[MAX_PLL_DIV] = {
MAX_PLL_DIV       596 drivers/clk/clk-stm32f4.c static const struct stm32f4_pll_data stm32f469_pll[MAX_PLL_DIV] = {
MAX_PLL_DIV       832 drivers/clk/clk-stm32f4.c 	for (i = 0; i < MAX_PLL_DIV; i++)