ARM_SMMU_CR0     3162 drivers/iommu/arm-smmu-v3.c 	ret = arm_smmu_write_reg_sync(smmu, 0, ARM_SMMU_CR0, ARM_SMMU_CR0ACK);
ARM_SMMU_CR0     3176 drivers/iommu/arm-smmu-v3.c 	reg = readl_relaxed(smmu->base + ARM_SMMU_CR0);
ARM_SMMU_CR0     3212 drivers/iommu/arm-smmu-v3.c 	ret = arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0,
ARM_SMMU_CR0     3242 drivers/iommu/arm-smmu-v3.c 	ret = arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0,
ARM_SMMU_CR0     3259 drivers/iommu/arm-smmu-v3.c 		ret = arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0,
ARM_SMMU_CR0     3269 drivers/iommu/arm-smmu-v3.c 		ret = arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0,
ARM_SMMU_CR0     3294 drivers/iommu/arm-smmu-v3.c 	ret = arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0,