MAX_BASES          28 drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.h 	uint32_t base[MAX_BASES]
MAX_BASES          43 drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.h 	struct mdp5_lm_instance instances[MAX_BASES];
MAX_BASES          75 drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.h 	uint32_t base[MAX_BASES];
MAX_BASES         472 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c 	struct drm_plane *primary[MAX_BASES] = { NULL };
MAX_BASES         473 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c 	struct drm_plane *cursor[MAX_BASES] = { NULL };