ARM_IDLECT2 98 arch/arm/mach-omap1/clock_data.c .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), ARM_IDLECT2 132 arch/arm/mach-omap1/clock_data.c .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), ARM_IDLECT2 151 arch/arm/mach-omap1/clock_data.c .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), ARM_IDLECT2 162 arch/arm/mach-omap1/clock_data.c .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), ARM_IDLECT2 175 arch/arm/mach-omap1/clock_data.c .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), ARM_IDLECT2 188 arch/arm/mach-omap1/clock_data.c .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), ARM_IDLECT2 347 arch/arm/mach-omap1/clock_data.c .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), ARM_IDLECT2 360 arch/arm/mach-omap1/clock_data.c .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), ARM_IDLECT2 385 arch/arm/mach-omap1/clock_data.c .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), ARM_IDLECT2 399 arch/arm/mach-omap1/clock_data.c .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), ARM_IDLECT2 887 arch/arm/mach-omap1/clock_data.c omap_writew(0x0000, ARM_IDLECT2); /* Turn LCD clock off also */ ARM_IDLECT2 147 arch/arm/mach-omap1/pm.c omap_readl(ARM_IDLECT2)); ARM_IDLECT2 271 arch/arm/mach-omap1/pm.c ARM_SAVE(ARM_IDLECT2); ARM_IDLECT2 295 arch/arm/mach-omap1/pm.c omap_writew(omap_readw(ARM_IDLECT2) | 1 << EN_APICK, ARM_IDLECT2); ARM_IDLECT2 349 arch/arm/mach-omap1/pm.c omap_writew(omap_readw(ARM_IDLECT2) | 1 << EN_APICK, ARM_IDLECT2); ARM_IDLECT2 420 arch/arm/mach-omap1/pm.c ARM_SAVE(ARM_IDLECT2); ARM_IDLECT2 475 arch/arm/mach-omap1/pm.c ARM_SHOW(ARM_IDLECT2), ARM_IDLECT2 602 drivers/video/fbdev/omap/sossi.c l = omap_readl(ARM_IDLECT2); ARM_IDLECT2 604 drivers/video/fbdev/omap/sossi.c omap_writel(l, ARM_IDLECT2);