MASK_ACROSS 187 drivers/infiniband/hw/qib/qib_iba7322.c (((value) >> SYM_LSB(regname, fldname)) & MASK_ACROSS(0, nbits)) MASK_ACROSS 950 drivers/infiniband/hw/qib/qib_iba7322.c #define QIB_I_RCVURG_RMASK MASK_ACROSS(0, 17) MASK_ACROSS 953 drivers/infiniband/hw/qib/qib_iba7322.c #define QIB_I_RCVAVAIL_RMASK MASK_ACROSS(0, 17) MASK_ACROSS 1300 drivers/infiniband/hw/qib/qib_iba7322.c #define INTR_AUTO_P(fldname) { .mask = MASK_ACROSS(\ MASK_ACROSS 1305 drivers/infiniband/hw/qib/qib_iba7322.c #define INTR_AUTO_PI(fldname) { .mask = MASK_ACROSS(\ MASK_ACROSS 1313 drivers/infiniband/hw/qib/qib_iba7322.c #define INTR_AUTO_C(fldname) { .mask = MASK_ACROSS(\ MASK_ACROSS 6218 drivers/infiniband/hw/qib/qib_iba7322.c #define SENDCTRL_PIBP (MASK_ACROSS(0, 1) | MASK_ACROSS(3, 3) | \ MASK_ACROSS 6219 drivers/infiniband/hw/qib/qib_iba7322.c MASK_ACROSS(8, 15)) MASK_ACROSS 6220 drivers/infiniband/hw/qib/qib_iba7322.c #define RCVCTRL_PIBP (MASK_ACROSS(0, 17) | MASK_ACROSS(39, 41)) MASK_ACROSS 6221 drivers/infiniband/hw/qib/qib_iba7322.c #define ERRS_PIBP (MASK_ACROSS(57, 58) | MASK_ACROSS(54, 54) | \ MASK_ACROSS 6222 drivers/infiniband/hw/qib/qib_iba7322.c MASK_ACROSS(36, 49) | MASK_ACROSS(29, 34) | MASK_ACROSS(14, 17) | \ MASK_ACROSS 6223 drivers/infiniband/hw/qib/qib_iba7322.c MASK_ACROSS(0, 11))