MAC_REG_ADDR 217 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define MAC_REG_IDLO(idx) MAC_REG_ADDR(idx, A_GMAC_MACID_LO) MAC_REG_ADDR 218 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define MAC_REG_IDHI(idx) MAC_REG_ADDR(idx, A_GMAC_MACID_HI) MAC_REG_ADDR 219 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define MAC_REG_CSR(idx) MAC_REG_ADDR(idx, A_GMAC_CSR) MAC_REG_ADDR 220 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define MAC_REG_IFS(idx) MAC_REG_ADDR(idx, A_GMAC_IFS) MAC_REG_ADDR 221 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define MAC_REG_LARGEFRAMELENGTH(idx) MAC_REG_ADDR(idx, A_GMAC_JUMBO_FRAME_LEN) MAC_REG_ADDR 222 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define MAC_REG_LINKDLY(idx) MAC_REG_ADDR(idx, A_GMAC_LNK_DLY) MAC_REG_ADDR 223 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define MAC_REG_PAUSETIME(idx) MAC_REG_ADDR(idx, A_GMAC_PAUSETIME) MAC_REG_ADDR 224 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define MAC_REG_CASTLO(idx) MAC_REG_ADDR(idx, A_GMAC_MCAST_LO) MAC_REG_ADDR 225 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define MAC_REG_MCASTHI(idx) MAC_REG_ADDR(idx, A_GMAC_MCAST_HI) MAC_REG_ADDR 226 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define MAC_REG_CASTMASKLO(idx) MAC_REG_ADDR(idx, A_GMAC_MCAST_MASK_LO) MAC_REG_ADDR 227 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define MAC_REG_MCASTMASKHI(idx) MAC_REG_ADDR(idx, A_GMAC_MCAST_MASK_HI) MAC_REG_ADDR 228 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define MAC_REG_RMCNT(idx) MAC_REG_ADDR(idx, A_GMAC_RMT_CNT) MAC_REG_ADDR 229 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define MAC_REG_RMDATA(idx) MAC_REG_ADDR(idx, A_GMAC_RMT_DATA) MAC_REG_ADDR 230 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define MAC_REG_GMRANDBACKOFFSEED(idx) MAC_REG_ADDR(idx, A_GMAC_BACKOFF_SEED) MAC_REG_ADDR 231 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define MAC_REG_TXFTHRESHOLDS(idx) MAC_REG_ADDR(idx, A_GMAC_TXF_THRES)