M 106 arch/arm/include/asm/hw_breakpoint.h #define ARM_DBG_READ(N, M, OP2, VAL) do {\ M 107 arch/arm/include/asm/hw_breakpoint.h asm volatile("mrc p14, 0, %0, " #N "," #M ", " #OP2 : "=r" (VAL));\ M 110 arch/arm/include/asm/hw_breakpoint.h #define ARM_DBG_WRITE(N, M, OP2, VAL) do {\ M 111 arch/arm/include/asm/hw_breakpoint.h asm volatile("mcr p14, 0, %0, " #N "," #M ", " #OP2 : : "r" (VAL));\ M 48 arch/arm/kernel/hw_breakpoint.c #define READ_WB_REG_CASE(OP2, M, VAL) \ M 49 arch/arm/kernel/hw_breakpoint.c case ((OP2 << 4) + M): \ M 50 arch/arm/kernel/hw_breakpoint.c ARM_DBG_READ(c0, c ## M, OP2, VAL); \ M 53 arch/arm/kernel/hw_breakpoint.c #define WRITE_WB_REG_CASE(OP2, M, VAL) \ M 54 arch/arm/kernel/hw_breakpoint.c case ((OP2 << 4) + M): \ M 55 arch/arm/kernel/hw_breakpoint.c ARM_DBG_WRITE(c0, c ## M, OP2, VAL); \ M 32 arch/ia64/kernel/kprobes.c { M, I, I }, /* 00 */ M 33 arch/ia64/kernel/kprobes.c { M, I, I }, /* 01 */ M 34 arch/ia64/kernel/kprobes.c { M, I, I }, /* 02 */ M 35 arch/ia64/kernel/kprobes.c { M, I, I }, /* 03 */ M 36 arch/ia64/kernel/kprobes.c { M, L, X }, /* 04 */ M 37 arch/ia64/kernel/kprobes.c { M, L, X }, /* 05 */ M 40 arch/ia64/kernel/kprobes.c { M, M, I }, /* 08 */ M 41 arch/ia64/kernel/kprobes.c { M, M, I }, /* 09 */ M 42 arch/ia64/kernel/kprobes.c { M, M, I }, /* 0A */ M 43 arch/ia64/kernel/kprobes.c { M, M, I }, /* 0B */ M 44 arch/ia64/kernel/kprobes.c { M, F, I }, /* 0C */ M 45 arch/ia64/kernel/kprobes.c { M, F, I }, /* 0D */ M 46 arch/ia64/kernel/kprobes.c { M, M, F }, /* 0E */ M 47 arch/ia64/kernel/kprobes.c { M, M, F }, /* 0F */ M 48 arch/ia64/kernel/kprobes.c { M, I, B }, /* 10 */ M 49 arch/ia64/kernel/kprobes.c { M, I, B }, /* 11 */ M 50 arch/ia64/kernel/kprobes.c { M, B, B }, /* 12 */ M 51 arch/ia64/kernel/kprobes.c { M, B, B }, /* 13 */ M 56 arch/ia64/kernel/kprobes.c { M, M, B }, /* 18 */ M 57 arch/ia64/kernel/kprobes.c { M, M, B }, /* 19 */ M 60 arch/ia64/kernel/kprobes.c { M, F, B }, /* 1C */ M 61 arch/ia64/kernel/kprobes.c { M, F, B }, /* 1D */ M 146 arch/ia64/kernel/kprobes.c (bundle_encoding[template][slot] == M))) M 157 arch/mips/include/asm/fpu_emulator.h #define MIPS_FPU_EMU_INC_STATS(M) \ M 160 arch/mips/include/asm/fpu_emulator.h __this_cpu_inc(fpuemustats.M); \ M 165 arch/mips/include/asm/fpu_emulator.h #define MIPS_FPU_EMU_INC_STATS(M) do { } while (0) M 46 arch/mips/include/asm/mips-r2-to-r6-emul.h #define MIPS_R2_STATS(M) \ M 52 arch/mips/include/asm/mips-r2-to-r6-emul.h __this_cpu_inc(mipsr2emustats.M); \ M 56 arch/mips/include/asm/mips-r2-to-r6-emul.h __this_cpu_inc(mipsr2bdemustats.M); \ M 61 arch/mips/include/asm/mips-r2-to-r6-emul.h #define MIPS_R2BR_STATS(M) \ M 64 arch/mips/include/asm/mips-r2-to-r6-emul.h __this_cpu_inc(mipsr2bremustats.M); \ M 70 arch/mips/include/asm/mips-r2-to-r6-emul.h #define MIPS_R2_STATS(M) do { } while (0) M 71 arch/mips/include/asm/mips-r2-to-r6-emul.h #define MIPS_R2BR_STATS(M) do { } while (0) M 43 arch/mips/mm/uasm-micromips.c [insn_addu] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_addu32_op), RT | RS | RD}, M 44 arch/mips/mm/uasm-micromips.c [insn_addiu] = {M(mm_addiu32_op, 0, 0, 0, 0, 0), RT | RS | SIMM}, M 45 arch/mips/mm/uasm-micromips.c [insn_and] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_and_op), RT | RS | RD}, M 46 arch/mips/mm/uasm-micromips.c [insn_andi] = {M(mm_andi32_op, 0, 0, 0, 0, 0), RT | RS | UIMM}, M 47 arch/mips/mm/uasm-micromips.c [insn_beq] = {M(mm_beq32_op, 0, 0, 0, 0, 0), RS | RT | BIMM}, M 49 arch/mips/mm/uasm-micromips.c [insn_bgez] = {M(mm_pool32i_op, mm_bgez_op, 0, 0, 0, 0), RS | BIMM}, M 51 arch/mips/mm/uasm-micromips.c [insn_bltz] = {M(mm_pool32i_op, mm_bltz_op, 0, 0, 0, 0), RS | BIMM}, M 53 arch/mips/mm/uasm-micromips.c [insn_bne] = {M(mm_bne32_op, 0, 0, 0, 0, 0), RT | RS | BIMM}, M 54 arch/mips/mm/uasm-micromips.c [insn_cache] = {M(mm_pool32b_op, 0, 0, mm_cache_func, 0, 0), RT | RS | SIMM}, M 55 arch/mips/mm/uasm-micromips.c [insn_cfc1] = {M(mm_pool32f_op, 0, 0, 0, mm_cfc1_op, mm_32f_73_op), RT | RS}, M 56 arch/mips/mm/uasm-micromips.c [insn_cfcmsa] = {M(mm_pool32s_op, 0, msa_cfc_op, 0, 0, mm_32s_elm_op), RD | RE}, M 57 arch/mips/mm/uasm-micromips.c [insn_ctc1] = {M(mm_pool32f_op, 0, 0, 0, mm_ctc1_op, mm_32f_73_op), RT | RS}, M 58 arch/mips/mm/uasm-micromips.c [insn_ctcmsa] = {M(mm_pool32s_op, 0, msa_ctc_op, 0, 0, mm_32s_elm_op), RD | RE}, M 61 arch/mips/mm/uasm-micromips.c [insn_di] = {M(mm_pool32a_op, 0, 0, 0, mm_di_op, mm_pool32axf_op), RS}, M 62 arch/mips/mm/uasm-micromips.c [insn_divu] = {M(mm_pool32a_op, 0, 0, 0, mm_divu_op, mm_pool32axf_op), RT | RS}, M 73 arch/mips/mm/uasm-micromips.c [insn_eret] = {M(mm_pool32a_op, 0, 0, 0, mm_eret_op, mm_pool32axf_op), 0}, M 74 arch/mips/mm/uasm-micromips.c [insn_ins] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_ins_op), RT | RS | RD | RE}, M 75 arch/mips/mm/uasm-micromips.c [insn_ext] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_ext_op), RT | RS | RD | RE}, M 76 arch/mips/mm/uasm-micromips.c [insn_j] = {M(mm_j32_op, 0, 0, 0, 0, 0), JIMM}, M 77 arch/mips/mm/uasm-micromips.c [insn_jal] = {M(mm_jal32_op, 0, 0, 0, 0, 0), JIMM}, M 78 arch/mips/mm/uasm-micromips.c [insn_jalr] = {M(mm_pool32a_op, 0, 0, 0, mm_jalr_op, mm_pool32axf_op), RT | RS}, M 79 arch/mips/mm/uasm-micromips.c [insn_jr] = {M(mm_pool32a_op, 0, 0, 0, mm_jalr_op, mm_pool32axf_op), RS}, M 80 arch/mips/mm/uasm-micromips.c [insn_lb] = {M(mm_lb32_op, 0, 0, 0, 0, 0), RT | RS | SIMM}, M 82 arch/mips/mm/uasm-micromips.c [insn_lh] = {M(mm_lh32_op, 0, 0, 0, 0, 0), RT | RS | SIMM}, M 83 arch/mips/mm/uasm-micromips.c [insn_ll] = {M(mm_pool32c_op, 0, 0, (mm_ll_func << 1), 0, 0), RS | RT | SIMM}, M 85 arch/mips/mm/uasm-micromips.c [insn_lui] = {M(mm_pool32i_op, mm_lui_op, 0, 0, 0, 0), RS | SIMM}, M 86 arch/mips/mm/uasm-micromips.c [insn_lw] = {M(mm_lw32_op, 0, 0, 0, 0, 0), RT | RS | SIMM}, M 87 arch/mips/mm/uasm-micromips.c [insn_mfc0] = {M(mm_pool32a_op, 0, 0, 0, mm_mfc0_op, mm_pool32axf_op), RT | RS | RD}, M 88 arch/mips/mm/uasm-micromips.c [insn_mfhi] = {M(mm_pool32a_op, 0, 0, 0, mm_mfhi32_op, mm_pool32axf_op), RS}, M 89 arch/mips/mm/uasm-micromips.c [insn_mflo] = {M(mm_pool32a_op, 0, 0, 0, mm_mflo32_op, mm_pool32axf_op), RS}, M 90 arch/mips/mm/uasm-micromips.c [insn_mtc0] = {M(mm_pool32a_op, 0, 0, 0, mm_mtc0_op, mm_pool32axf_op), RT | RS | RD}, M 91 arch/mips/mm/uasm-micromips.c [insn_mthi] = {M(mm_pool32a_op, 0, 0, 0, mm_mthi32_op, mm_pool32axf_op), RS}, M 92 arch/mips/mm/uasm-micromips.c [insn_mtlo] = {M(mm_pool32a_op, 0, 0, 0, mm_mtlo32_op, mm_pool32axf_op), RS}, M 93 arch/mips/mm/uasm-micromips.c [insn_mul] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_mul_op), RT | RS | RD}, M 94 arch/mips/mm/uasm-micromips.c [insn_or] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_or32_op), RT | RS | RD}, M 95 arch/mips/mm/uasm-micromips.c [insn_ori] = {M(mm_ori32_op, 0, 0, 0, 0, 0), RT | RS | UIMM}, M 96 arch/mips/mm/uasm-micromips.c [insn_pref] = {M(mm_pool32c_op, 0, 0, (mm_pref_func << 1), 0, 0), RT | RS | SIMM}, M 98 arch/mips/mm/uasm-micromips.c [insn_sc] = {M(mm_pool32c_op, 0, 0, (mm_sc_func << 1), 0, 0), RT | RS | SIMM}, M 101 arch/mips/mm/uasm-micromips.c [insn_sll] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_sll32_op), RT | RS | RD}, M 102 arch/mips/mm/uasm-micromips.c [insn_sllv] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_sllv32_op), RT | RS | RD}, M 103 arch/mips/mm/uasm-micromips.c [insn_slt] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_slt_op), RT | RS | RD}, M 104 arch/mips/mm/uasm-micromips.c [insn_sltiu] = {M(mm_sltiu32_op, 0, 0, 0, 0, 0), RT | RS | SIMM}, M 105 arch/mips/mm/uasm-micromips.c [insn_sltu] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_sltu_op), RT | RS | RD}, M 106 arch/mips/mm/uasm-micromips.c [insn_sra] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_sra_op), RT | RS | RD}, M 107 arch/mips/mm/uasm-micromips.c [insn_srav] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_srav_op), RT | RS | RD}, M 108 arch/mips/mm/uasm-micromips.c [insn_srl] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_srl32_op), RT | RS | RD}, M 109 arch/mips/mm/uasm-micromips.c [insn_srlv] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_srlv32_op), RT | RS | RD}, M 110 arch/mips/mm/uasm-micromips.c [insn_rotr] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_rotr_op), RT | RS | RD}, M 111 arch/mips/mm/uasm-micromips.c [insn_subu] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_subu32_op), RT | RS | RD}, M 112 arch/mips/mm/uasm-micromips.c [insn_sw] = {M(mm_sw32_op, 0, 0, 0, 0, 0), RT | RS | SIMM}, M 113 arch/mips/mm/uasm-micromips.c [insn_sync] = {M(mm_pool32a_op, 0, 0, 0, mm_sync_op, mm_pool32axf_op), RS}, M 114 arch/mips/mm/uasm-micromips.c [insn_tlbp] = {M(mm_pool32a_op, 0, 0, 0, mm_tlbp_op, mm_pool32axf_op), 0}, M 115 arch/mips/mm/uasm-micromips.c [insn_tlbr] = {M(mm_pool32a_op, 0, 0, 0, mm_tlbr_op, mm_pool32axf_op), 0}, M 116 arch/mips/mm/uasm-micromips.c [insn_tlbwi] = {M(mm_pool32a_op, 0, 0, 0, mm_tlbwi_op, mm_pool32axf_op), 0}, M 117 arch/mips/mm/uasm-micromips.c [insn_tlbwr] = {M(mm_pool32a_op, 0, 0, 0, mm_tlbwr_op, mm_pool32axf_op), 0}, M 118 arch/mips/mm/uasm-micromips.c [insn_wait] = {M(mm_pool32a_op, 0, 0, 0, mm_wait_op, mm_pool32axf_op), SCIMM}, M 119 arch/mips/mm/uasm-micromips.c [insn_wsbh] = {M(mm_pool32a_op, 0, 0, 0, mm_wsbh_op, mm_pool32axf_op), RT | RS}, M 120 arch/mips/mm/uasm-micromips.c [insn_xor] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_xor32_op), RT | RS | RD}, M 121 arch/mips/mm/uasm-micromips.c [insn_xori] = {M(mm_xori32_op, 0, 0, 0, 0, 0), RT | RS | UIMM}, M 124 arch/mips/mm/uasm-micromips.c [insn_syscall] = {M(mm_pool32a_op, 0, 0, 0, mm_syscall_op, mm_pool32axf_op), SCIMM}, M 51 arch/mips/mm/uasm-mips.c [insn_addiu] = {M(addiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM}, M 52 arch/mips/mm/uasm-mips.c [insn_addu] = {M(spec_op, 0, 0, 0, 0, addu_op), RS | RT | RD}, M 53 arch/mips/mm/uasm-mips.c [insn_and] = {M(spec_op, 0, 0, 0, 0, and_op), RS | RT | RD}, M 54 arch/mips/mm/uasm-mips.c [insn_andi] = {M(andi_op, 0, 0, 0, 0, 0), RS | RT | UIMM}, M 55 arch/mips/mm/uasm-mips.c [insn_bbit0] = {M(lwc2_op, 0, 0, 0, 0, 0), RS | RT | BIMM}, M 56 arch/mips/mm/uasm-mips.c [insn_bbit1] = {M(swc2_op, 0, 0, 0, 0, 0), RS | RT | BIMM}, M 57 arch/mips/mm/uasm-mips.c [insn_beq] = {M(beq_op, 0, 0, 0, 0, 0), RS | RT | BIMM}, M 58 arch/mips/mm/uasm-mips.c [insn_beql] = {M(beql_op, 0, 0, 0, 0, 0), RS | RT | BIMM}, M 59 arch/mips/mm/uasm-mips.c [insn_bgez] = {M(bcond_op, 0, bgez_op, 0, 0, 0), RS | BIMM}, M 60 arch/mips/mm/uasm-mips.c [insn_bgezl] = {M(bcond_op, 0, bgezl_op, 0, 0, 0), RS | BIMM}, M 61 arch/mips/mm/uasm-mips.c [insn_bgtz] = {M(bgtz_op, 0, 0, 0, 0, 0), RS | BIMM}, M 62 arch/mips/mm/uasm-mips.c [insn_blez] = {M(blez_op, 0, 0, 0, 0, 0), RS | BIMM}, M 63 arch/mips/mm/uasm-mips.c [insn_bltz] = {M(bcond_op, 0, bltz_op, 0, 0, 0), RS | BIMM}, M 64 arch/mips/mm/uasm-mips.c [insn_bltzl] = {M(bcond_op, 0, bltzl_op, 0, 0, 0), RS | BIMM}, M 65 arch/mips/mm/uasm-mips.c [insn_bne] = {M(bne_op, 0, 0, 0, 0, 0), RS | RT | BIMM}, M 66 arch/mips/mm/uasm-mips.c [insn_break] = {M(spec_op, 0, 0, 0, 0, break_op), SCIMM}, M 68 arch/mips/mm/uasm-mips.c [insn_cache] = {M(cache_op, 0, 0, 0, 0, 0), RS | RT | SIMM}, M 72 arch/mips/mm/uasm-mips.c [insn_cfc1] = {M(cop1_op, cfc_op, 0, 0, 0, 0), RT | RD}, M 73 arch/mips/mm/uasm-mips.c [insn_cfcmsa] = {M(msa_op, 0, msa_cfc_op, 0, 0, msa_elm_op), RD | RE}, M 74 arch/mips/mm/uasm-mips.c [insn_ctc1] = {M(cop1_op, ctc_op, 0, 0, 0, 0), RT | RD}, M 75 arch/mips/mm/uasm-mips.c [insn_ctcmsa] = {M(msa_op, 0, msa_ctc_op, 0, 0, msa_elm_op), RD | RE}, M 76 arch/mips/mm/uasm-mips.c [insn_daddiu] = {M(daddiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM}, M 77 arch/mips/mm/uasm-mips.c [insn_daddu] = {M(spec_op, 0, 0, 0, 0, daddu_op), RS | RT | RD}, M 78 arch/mips/mm/uasm-mips.c [insn_ddivu] = {M(spec_op, 0, 0, 0, 0, ddivu_op), RS | RT}, M 79 arch/mips/mm/uasm-mips.c [insn_ddivu_r6] = {M(spec_op, 0, 0, 0, ddivu_ddivu6_op, ddivu_op), M 81 arch/mips/mm/uasm-mips.c [insn_di] = {M(cop0_op, mfmc0_op, 0, 12, 0, 0), RT}, M 82 arch/mips/mm/uasm-mips.c [insn_dins] = {M(spec3_op, 0, 0, 0, 0, dins_op), RS | RT | RD | RE}, M 83 arch/mips/mm/uasm-mips.c [insn_dinsm] = {M(spec3_op, 0, 0, 0, 0, dinsm_op), RS | RT | RD | RE}, M 84 arch/mips/mm/uasm-mips.c [insn_dinsu] = {M(spec3_op, 0, 0, 0, 0, dinsu_op), RS | RT | RD | RE}, M 85 arch/mips/mm/uasm-mips.c [insn_divu] = {M(spec_op, 0, 0, 0, 0, divu_op), RS | RT}, M 86 arch/mips/mm/uasm-mips.c [insn_divu_r6] = {M(spec_op, 0, 0, 0, divu_divu6_op, divu_op), M 88 arch/mips/mm/uasm-mips.c [insn_dmfc0] = {M(cop0_op, dmfc_op, 0, 0, 0, 0), RT | RD | SET}, M 89 arch/mips/mm/uasm-mips.c [insn_dmodu] = {M(spec_op, 0, 0, 0, ddivu_dmodu_op, ddivu_op), M 91 arch/mips/mm/uasm-mips.c [insn_dmtc0] = {M(cop0_op, dmtc_op, 0, 0, 0, 0), RT | RD | SET}, M 92 arch/mips/mm/uasm-mips.c [insn_dmultu] = {M(spec_op, 0, 0, 0, 0, dmultu_op), RS | RT}, M 93 arch/mips/mm/uasm-mips.c [insn_dmulu] = {M(spec_op, 0, 0, 0, dmult_dmul_op, dmultu_op), M 95 arch/mips/mm/uasm-mips.c [insn_drotr] = {M(spec_op, 1, 0, 0, 0, dsrl_op), RT | RD | RE}, M 96 arch/mips/mm/uasm-mips.c [insn_drotr32] = {M(spec_op, 1, 0, 0, 0, dsrl32_op), RT | RD | RE}, M 97 arch/mips/mm/uasm-mips.c [insn_dsbh] = {M(spec3_op, 0, 0, 0, dsbh_op, dbshfl_op), RT | RD}, M 98 arch/mips/mm/uasm-mips.c [insn_dshd] = {M(spec3_op, 0, 0, 0, dshd_op, dbshfl_op), RT | RD}, M 99 arch/mips/mm/uasm-mips.c [insn_dsll] = {M(spec_op, 0, 0, 0, 0, dsll_op), RT | RD | RE}, M 100 arch/mips/mm/uasm-mips.c [insn_dsll32] = {M(spec_op, 0, 0, 0, 0, dsll32_op), RT | RD | RE}, M 101 arch/mips/mm/uasm-mips.c [insn_dsllv] = {M(spec_op, 0, 0, 0, 0, dsllv_op), RS | RT | RD}, M 102 arch/mips/mm/uasm-mips.c [insn_dsra] = {M(spec_op, 0, 0, 0, 0, dsra_op), RT | RD | RE}, M 103 arch/mips/mm/uasm-mips.c [insn_dsra32] = {M(spec_op, 0, 0, 0, 0, dsra32_op), RT | RD | RE}, M 104 arch/mips/mm/uasm-mips.c [insn_dsrav] = {M(spec_op, 0, 0, 0, 0, dsrav_op), RS | RT | RD}, M 105 arch/mips/mm/uasm-mips.c [insn_dsrl] = {M(spec_op, 0, 0, 0, 0, dsrl_op), RT | RD | RE}, M 106 arch/mips/mm/uasm-mips.c [insn_dsrl32] = {M(spec_op, 0, 0, 0, 0, dsrl32_op), RT | RD | RE}, M 107 arch/mips/mm/uasm-mips.c [insn_dsrlv] = {M(spec_op, 0, 0, 0, 0, dsrlv_op), RS | RT | RD}, M 108 arch/mips/mm/uasm-mips.c [insn_dsubu] = {M(spec_op, 0, 0, 0, 0, dsubu_op), RS | RT | RD}, M 109 arch/mips/mm/uasm-mips.c [insn_eret] = {M(cop0_op, cop_op, 0, 0, 0, eret_op), 0}, M 110 arch/mips/mm/uasm-mips.c [insn_ext] = {M(spec3_op, 0, 0, 0, 0, ext_op), RS | RT | RD | RE}, M 111 arch/mips/mm/uasm-mips.c [insn_ins] = {M(spec3_op, 0, 0, 0, 0, ins_op), RS | RT | RD | RE}, M 112 arch/mips/mm/uasm-mips.c [insn_j] = {M(j_op, 0, 0, 0, 0, 0), JIMM}, M 113 arch/mips/mm/uasm-mips.c [insn_jal] = {M(jal_op, 0, 0, 0, 0, 0), JIMM}, M 114 arch/mips/mm/uasm-mips.c [insn_jalr] = {M(spec_op, 0, 0, 0, 0, jalr_op), RS | RD}, M 116 arch/mips/mm/uasm-mips.c [insn_jr] = {M(spec_op, 0, 0, 0, 0, jr_op), RS}, M 118 arch/mips/mm/uasm-mips.c [insn_jr] = {M(spec_op, 0, 0, 0, 0, jalr_op), RS}, M 120 arch/mips/mm/uasm-mips.c [insn_lb] = {M(lb_op, 0, 0, 0, 0, 0), RS | RT | SIMM}, M 121 arch/mips/mm/uasm-mips.c [insn_lbu] = {M(lbu_op, 0, 0, 0, 0, 0), RS | RT | SIMM}, M 122 arch/mips/mm/uasm-mips.c [insn_ld] = {M(ld_op, 0, 0, 0, 0, 0), RS | RT | SIMM}, M 123 arch/mips/mm/uasm-mips.c [insn_lddir] = {M(lwc2_op, 0, 0, 0, lddir_op, mult_op), RS | RT | RD}, M 124 arch/mips/mm/uasm-mips.c [insn_ldpte] = {M(lwc2_op, 0, 0, 0, ldpte_op, mult_op), RS | RD}, M 125 arch/mips/mm/uasm-mips.c [insn_ldx] = {M(spec3_op, 0, 0, 0, ldx_op, lx_op), RS | RT | RD}, M 126 arch/mips/mm/uasm-mips.c [insn_lh] = {M(lh_op, 0, 0, 0, 0, 0), RS | RT | SIMM}, M 127 arch/mips/mm/uasm-mips.c [insn_lhu] = {M(lhu_op, 0, 0, 0, 0, 0), RS | RT | SIMM}, M 129 arch/mips/mm/uasm-mips.c [insn_ll] = {M(ll_op, 0, 0, 0, 0, 0), RS | RT | SIMM}, M 130 arch/mips/mm/uasm-mips.c [insn_lld] = {M(lld_op, 0, 0, 0, 0, 0), RS | RT | SIMM}, M 135 arch/mips/mm/uasm-mips.c [insn_lui] = {M(lui_op, 0, 0, 0, 0, 0), RT | SIMM}, M 136 arch/mips/mm/uasm-mips.c [insn_lw] = {M(lw_op, 0, 0, 0, 0, 0), RS | RT | SIMM}, M 137 arch/mips/mm/uasm-mips.c [insn_lwu] = {M(lwu_op, 0, 0, 0, 0, 0), RS | RT | SIMM}, M 138 arch/mips/mm/uasm-mips.c [insn_lwx] = {M(spec3_op, 0, 0, 0, lwx_op, lx_op), RS | RT | RD}, M 139 arch/mips/mm/uasm-mips.c [insn_mfc0] = {M(cop0_op, mfc_op, 0, 0, 0, 0), RT | RD | SET}, M 140 arch/mips/mm/uasm-mips.c [insn_mfhc0] = {M(cop0_op, mfhc0_op, 0, 0, 0, 0), RT | RD | SET}, M 141 arch/mips/mm/uasm-mips.c [insn_mfhi] = {M(spec_op, 0, 0, 0, 0, mfhi_op), RD}, M 142 arch/mips/mm/uasm-mips.c [insn_mflo] = {M(spec_op, 0, 0, 0, 0, mflo_op), RD}, M 143 arch/mips/mm/uasm-mips.c [insn_modu] = {M(spec_op, 0, 0, 0, divu_modu_op, divu_op), M 145 arch/mips/mm/uasm-mips.c [insn_movn] = {M(spec_op, 0, 0, 0, 0, movn_op), RS | RT | RD}, M 146 arch/mips/mm/uasm-mips.c [insn_movz] = {M(spec_op, 0, 0, 0, 0, movz_op), RS | RT | RD}, M 147 arch/mips/mm/uasm-mips.c [insn_mtc0] = {M(cop0_op, mtc_op, 0, 0, 0, 0), RT | RD | SET}, M 148 arch/mips/mm/uasm-mips.c [insn_mthc0] = {M(cop0_op, mthc0_op, 0, 0, 0, 0), RT | RD | SET}, M 149 arch/mips/mm/uasm-mips.c [insn_mthi] = {M(spec_op, 0, 0, 0, 0, mthi_op), RS}, M 150 arch/mips/mm/uasm-mips.c [insn_mtlo] = {M(spec_op, 0, 0, 0, 0, mtlo_op), RS}, M 151 arch/mips/mm/uasm-mips.c [insn_mulu] = {M(spec_op, 0, 0, 0, multu_mulu_op, multu_op), M 154 arch/mips/mm/uasm-mips.c [insn_mul] = {M(spec2_op, 0, 0, 0, 0, mul_op), RS | RT | RD}, M 156 arch/mips/mm/uasm-mips.c [insn_mul] = {M(spec_op, 0, 0, 0, mult_mul_op, mult_op), RS | RT | RD}, M 158 arch/mips/mm/uasm-mips.c [insn_multu] = {M(spec_op, 0, 0, 0, 0, multu_op), RS | RT}, M 159 arch/mips/mm/uasm-mips.c [insn_nor] = {M(spec_op, 0, 0, 0, 0, nor_op), RS | RT | RD}, M 160 arch/mips/mm/uasm-mips.c [insn_or] = {M(spec_op, 0, 0, 0, 0, or_op), RS | RT | RD}, M 161 arch/mips/mm/uasm-mips.c [insn_ori] = {M(ori_op, 0, 0, 0, 0, 0), RS | RT | UIMM}, M 163 arch/mips/mm/uasm-mips.c [insn_pref] = {M(pref_op, 0, 0, 0, 0, 0), RS | RT | SIMM}, M 167 arch/mips/mm/uasm-mips.c [insn_rfe] = {M(cop0_op, cop_op, 0, 0, 0, rfe_op), 0}, M 168 arch/mips/mm/uasm-mips.c [insn_rotr] = {M(spec_op, 1, 0, 0, 0, srl_op), RT | RD | RE}, M 169 arch/mips/mm/uasm-mips.c [insn_sb] = {M(sb_op, 0, 0, 0, 0, 0), RS | RT | SIMM}, M 171 arch/mips/mm/uasm-mips.c [insn_sc] = {M(sc_op, 0, 0, 0, 0, 0), RS | RT | SIMM}, M 172 arch/mips/mm/uasm-mips.c [insn_scd] = {M(scd_op, 0, 0, 0, 0, 0), RS | RT | SIMM}, M 177 arch/mips/mm/uasm-mips.c [insn_sd] = {M(sd_op, 0, 0, 0, 0, 0), RS | RT | SIMM}, M 178 arch/mips/mm/uasm-mips.c [insn_seleqz] = {M(spec_op, 0, 0, 0, 0, seleqz_op), RS | RT | RD}, M 179 arch/mips/mm/uasm-mips.c [insn_selnez] = {M(spec_op, 0, 0, 0, 0, selnez_op), RS | RT | RD}, M 180 arch/mips/mm/uasm-mips.c [insn_sh] = {M(sh_op, 0, 0, 0, 0, 0), RS | RT | SIMM}, M 181 arch/mips/mm/uasm-mips.c [insn_sll] = {M(spec_op, 0, 0, 0, 0, sll_op), RT | RD | RE}, M 182 arch/mips/mm/uasm-mips.c [insn_sllv] = {M(spec_op, 0, 0, 0, 0, sllv_op), RS | RT | RD}, M 183 arch/mips/mm/uasm-mips.c [insn_slt] = {M(spec_op, 0, 0, 0, 0, slt_op), RS | RT | RD}, M 184 arch/mips/mm/uasm-mips.c [insn_slti] = {M(slti_op, 0, 0, 0, 0, 0), RS | RT | SIMM}, M 185 arch/mips/mm/uasm-mips.c [insn_sltiu] = {M(sltiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM}, M 186 arch/mips/mm/uasm-mips.c [insn_sltu] = {M(spec_op, 0, 0, 0, 0, sltu_op), RS | RT | RD}, M 187 arch/mips/mm/uasm-mips.c [insn_sra] = {M(spec_op, 0, 0, 0, 0, sra_op), RT | RD | RE}, M 188 arch/mips/mm/uasm-mips.c [insn_srav] = {M(spec_op, 0, 0, 0, 0, srav_op), RS | RT | RD}, M 189 arch/mips/mm/uasm-mips.c [insn_srl] = {M(spec_op, 0, 0, 0, 0, srl_op), RT | RD | RE}, M 190 arch/mips/mm/uasm-mips.c [insn_srlv] = {M(spec_op, 0, 0, 0, 0, srlv_op), RS | RT | RD}, M 191 arch/mips/mm/uasm-mips.c [insn_subu] = {M(spec_op, 0, 0, 0, 0, subu_op), RS | RT | RD}, M 192 arch/mips/mm/uasm-mips.c [insn_sw] = {M(sw_op, 0, 0, 0, 0, 0), RS | RT | SIMM}, M 193 arch/mips/mm/uasm-mips.c [insn_sync] = {M(spec_op, 0, 0, 0, 0, sync_op), RE}, M 194 arch/mips/mm/uasm-mips.c [insn_syscall] = {M(spec_op, 0, 0, 0, 0, syscall_op), SCIMM}, M 195 arch/mips/mm/uasm-mips.c [insn_tlbp] = {M(cop0_op, cop_op, 0, 0, 0, tlbp_op), 0}, M 196 arch/mips/mm/uasm-mips.c [insn_tlbr] = {M(cop0_op, cop_op, 0, 0, 0, tlbr_op), 0}, M 197 arch/mips/mm/uasm-mips.c [insn_tlbwi] = {M(cop0_op, cop_op, 0, 0, 0, tlbwi_op), 0}, M 198 arch/mips/mm/uasm-mips.c [insn_tlbwr] = {M(cop0_op, cop_op, 0, 0, 0, tlbwr_op), 0}, M 199 arch/mips/mm/uasm-mips.c [insn_wait] = {M(cop0_op, cop_op, 0, 0, 0, wait_op), SCIMM}, M 200 arch/mips/mm/uasm-mips.c [insn_wsbh] = {M(spec3_op, 0, 0, 0, wsbh_op, bshfl_op), RT | RD}, M 201 arch/mips/mm/uasm-mips.c [insn_xor] = {M(spec_op, 0, 0, 0, 0, xor_op), RS | RT | RD}, M 202 arch/mips/mm/uasm-mips.c [insn_xori] = {M(xori_op, 0, 0, 0, 0, 0), RS | RT | UIMM}, M 203 arch/mips/mm/uasm-mips.c [insn_yield] = {M(spec3_op, 0, 0, 0, 0, yield_op), RS | RD}, M 2461 arch/powerpc/xmon/ppc-opc.c #define M_MASK M (0x3f, 1) M 2468 arch/powerpc/xmon/ppc-opc.c #define MME(op, me, rc) (M ((op), (rc)) | ((((unsigned long)(me)) & 0x1f) << 1)) M 4587 arch/powerpc/xmon/ppc-opc.c {"rlwimi", M(20,0), M_MASK, PPCCOM, PPCVLE, {RA, RS, SH, MBE, ME}}, M 4588 arch/powerpc/xmon/ppc-opc.c {"rlimi", M(20,0), M_MASK, PWRCOM, PPCVLE, {RA, RS, SH, MBE, ME}}, M 4590 arch/powerpc/xmon/ppc-opc.c {"rlwimi.", M(20,1), M_MASK, PPCCOM, PPCVLE, {RA, RS, SH, MBE, ME}}, M 4591 arch/powerpc/xmon/ppc-opc.c {"rlimi.", M(20,1), M_MASK, PWRCOM, PPCVLE, {RA, RS, SH, MBE, ME}}, M 4595 arch/powerpc/xmon/ppc-opc.c {"rlwinm", M(21,0), M_MASK, PPCCOM, PPCVLE, {RA, RS, SH, MBE, ME}}, M 4596 arch/powerpc/xmon/ppc-opc.c {"rlinm", M(21,0), M_MASK, PWRCOM, PPCVLE, {RA, RS, SH, MBE, ME}}, M 4599 arch/powerpc/xmon/ppc-opc.c {"rlwinm.", M(21,1), M_MASK, PPCCOM, PPCVLE, {RA, RS, SH, MBE, ME}}, M 4600 arch/powerpc/xmon/ppc-opc.c {"rlinm.", M(21,1), M_MASK, PWRCOM, PPCVLE, {RA, RS, SH, MBE, ME}}, M 4602 arch/powerpc/xmon/ppc-opc.c {"rlmi", M(22,0), M_MASK, M601, PPCVLE, {RA, RS, RB, MBE, ME}}, M 4603 arch/powerpc/xmon/ppc-opc.c {"rlmi.", M(22,1), M_MASK, M601, PPCVLE, {RA, RS, RB, MBE, ME}}, M 4606 arch/powerpc/xmon/ppc-opc.c {"rlwnm", M(23,0), M_MASK, PPCCOM, PPCVLE, {RA, RS, RB, MBE, ME}}, M 4607 arch/powerpc/xmon/ppc-opc.c {"rlnm", M(23,0), M_MASK, PWRCOM, PPCVLE, {RA, RS, RB, MBE, ME}}, M 4609 arch/powerpc/xmon/ppc-opc.c {"rlwnm.", M(23,1), M_MASK, PPCCOM, PPCVLE, {RA, RS, RB, MBE, ME}}, M 4610 arch/powerpc/xmon/ppc-opc.c {"rlnm.", M(23,1), M_MASK, PWRCOM, PPCVLE, {RA, RS, RB, MBE, ME}}, M 7106 arch/powerpc/xmon/ppc-opc.c {"e_rlwimi", M(29,0), M_MASK, PPCVLE, 0, {RA, RS, SH, MB, ME}}, M 7107 arch/powerpc/xmon/ppc-opc.c {"e_rlwinm", M(29,1), M_MASK, PPCVLE, 0, {RA, RT, SH, MBE, ME}}, M 68 arch/sh/math-emu/math.c #define CMP_X(SZ,R,M,N) do{ \ M 70 arch/sh/math-emu/math.c UNPACK_##SZ(Fm, M); UNPACK_##SZ(Fn, N); \ M 72 arch/sh/math-emu/math.c #define EQ_X(SZ,R,M,N) do{ \ M 74 arch/sh/math-emu/math.c UNPACK_##SZ(Fm, M); UNPACK_##SZ(Fn, N); \ M 99 arch/sh/math-emu/math.c #define ARITH_X(SZ,OP,M,N) do{ \ M 101 arch/sh/math-emu/math.c UNPACK_##SZ(Fm, M); UNPACK_##SZ(Fn, N); \ M 1102 arch/sparc/kernel/traps_64.c /*00*/NONE, C0, C1, M2, C2, M2, M3, 47, C3, M2, M2, 53, M2, 41, 29, M, M 1103 arch/sparc/kernel/traps_64.c /*01*/C4, M, M, 50, M2, 38, 25, M2, M2, 33, 24, M2, 11, M, M2, 16, M 1104 arch/sparc/kernel/traps_64.c /*02*/C5, M, M, 46, M2, 37, 19, M2, M, 31, 32, M, 7, M2, M2, 10, M 1105 arch/sparc/kernel/traps_64.c /*03*/M2, 40, 13, M2, 59, M, M2, 66, M, M2, M2, 0, M2, 67, 71, M, M 1106 arch/sparc/kernel/traps_64.c /*04*/C6, M, M, 43, M, 36, 18, M, M2, 49, 15, M, 63, M2, M2, 6, M 1107 arch/sparc/kernel/traps_64.c /*05*/M2, 44, 28, M2, M, M2, M2, 52, 68, M2, M2, 62, M2, M3, M3, M4, M 1108 arch/sparc/kernel/traps_64.c /*06*/M2, 26, 106, M2, 64, M, M2, 2, 120, M, M2, M3, M, M3, M3, M4, M 1109 arch/sparc/kernel/traps_64.c /*07*/116, M2, M2, M3, M2, M3, M, M4, M2, 58, 54, M2, M, M4, M4, M3, M 1110 arch/sparc/kernel/traps_64.c /*08*/C7, M2, M, 42, M, 35, 17, M2, M, 45, 14, M2, 21, M2, M2, 5, M 1111 arch/sparc/kernel/traps_64.c /*09*/M, 27, M, M, 99, M, M, 3, 114, M2, M2, 20, M2, M3, M3, M, M 1112 arch/sparc/kernel/traps_64.c /*0a*/M2, 23, 113, M2, 112, M2, M, 51, 95, M, M2, M3, M2, M3, M3, M2, M 1113 arch/sparc/kernel/traps_64.c /*0b*/103, M, M2, M3, M2, M3, M3, M4, M2, 48, M, M, 73, M2, M, M3, M 1114 arch/sparc/kernel/traps_64.c /*0c*/M2, 22, 110, M2, 109, M2, M, 9, 108, M2, M, M3, M2, M3, M3, M, M 1115 arch/sparc/kernel/traps_64.c /*0d*/102, M2, M, M, M2, M3, M3, M, M2, M3, M3, M2, M, M4, M, M3, M 1116 arch/sparc/kernel/traps_64.c /*0e*/98, M, M2, M3, M2, M, M3, M4, M2, M3, M3, M4, M3, M, M, M, M 1117 arch/sparc/kernel/traps_64.c /*0f*/M2, M3, M3, M, M3, M, M, M, 56, M4, M, M3, M4, M, M, M, M 1118 arch/sparc/kernel/traps_64.c /*10*/C8, M, M2, 39, M, 34, 105, M2, M, 30, 104, M, 101, M, M, 4, M 1119 arch/sparc/kernel/traps_64.c /*11*/M, M, 100, M, 83, M, M2, 12, 87, M, M, 57, M2, M, M3, M, M 1120 arch/sparc/kernel/traps_64.c /*12*/M2, 97, 82, M2, 78, M2, M2, 1, 96, M, M, M, M, M, M3, M2, M 1121 arch/sparc/kernel/traps_64.c /*13*/94, M, M2, M3, M2, M, M3, M, M2, M, 79, M, 69, M, M4, M, M 1122 arch/sparc/kernel/traps_64.c /*14*/M2, 93, 92, M, 91, M, M2, 8, 90, M2, M2, M, M, M, M, M4, M 1123 arch/sparc/kernel/traps_64.c /*15*/89, M, M, M3, M2, M3, M3, M, M, M, M3, M2, M3, M2, M, M3, M 1124 arch/sparc/kernel/traps_64.c /*16*/86, M, M2, M3, M2, M, M3, M, M2, M, M3, M, M3, M, M, M3, M 1125 arch/sparc/kernel/traps_64.c /*17*/M, M, M3, M2, M3, M2, M4, M, 60, M, M2, M3, M4, M, M, M2, M 1126 arch/sparc/kernel/traps_64.c /*18*/M2, 88, 85, M2, 84, M, M2, 55, 81, M2, M2, M3, M2, M3, M3, M4, M 1127 arch/sparc/kernel/traps_64.c /*19*/77, M, M, M, M2, M3, M, M, M2, M3, M3, M4, M3, M2, M, M, M 1128 arch/sparc/kernel/traps_64.c /*1a*/74, M, M2, M3, M, M, M3, M, M, M, M3, M, M3, M, M4, M3, M 1129 arch/sparc/kernel/traps_64.c /*1b*/M2, 70, 107, M4, 65, M2, M2, M, 127, M, M, M, M2, M3, M3, M, M 1130 arch/sparc/kernel/traps_64.c /*1c*/80, M2, M2, 72, M, 119, 118, M, M2, 126, 76, M, 125, M, M4, M3, M 1131 arch/sparc/kernel/traps_64.c /*1d*/M2, 115, 124, M, 75, M, M, M3, 61, M, M4, M, M4, M, M, M, M 1132 arch/sparc/kernel/traps_64.c /*1e*/M, 123, 122, M4, 121, M4, M, M3, 117, M2, M2, M3, M4, M3, M, M, M 1133 arch/sparc/kernel/traps_64.c /*1f*/111, M, M, M, M4, M3, M3, M, M, M, M3, M, M3, M2, M, M M 2871 drivers/char/pcmcia/synclink_cs.c unsigned int M, N; M 2883 drivers/char/pcmcia/synclink_cs.c for (M = 1; N > 64 && M < 16; M++) M 2896 drivers/char/pcmcia/synclink_cs.c (unsigned char) ((M << 6) + N)); M 2898 drivers/char/pcmcia/synclink_cs.c val |= ((M << 4) & 0xc0); M 34 drivers/clk/pxa/clk-pxa25x.c #define PXA25x_CCCR(N2, M, L) (N2 << 7 | M << 5 | L) M 56 drivers/cpufreq/pxa3xx-cpufreq.c .hss = HSS_##_hss##M, \ M 57 drivers/cpufreq/pxa3xx-cpufreq.c .dmcfs = DMCFS_##_dmc##M, \ M 58 drivers/cpufreq/pxa3xx-cpufreq.c .smcfs = SMCFS_##_smc##M, \ M 59 drivers/cpufreq/pxa3xx-cpufreq.c .sflfs = SFLFS_##_sfl##M, \ M 424 drivers/edac/sb_edac.c #define PCI_ID_TABLE_ENTRY(A, N, M, T) { \ M 428 drivers/edac/sb_edac.c .n_imcs_per_sock = M, \ M 550 drivers/gpio/gpio-tegra186.c TEGRA186_MAIN_GPIO_PORT( M, 0x5600, 6, 5), M 615 drivers/gpio/gpio-tegra186.c TEGRA194_MAIN_GPIO_PORT( M, 0x2600, 8, 2), M 29 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c unsigned long M; M 249 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c pllreg |= HIBMC_FIELD(HIBMC_PLL_CTRL_M, pll.M); M 1032 drivers/gpu/drm/nouveau/nouveau_bios.c parse_bit_table(bios, bitoffset, &BIT_TABLE('M', M)); /* memory? */ M 66 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c u32 M = (coef & 0x000000ff) >> 0; M 94 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c return sclk * N / M / P; M 255 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c int N, M, P, ret; M 265 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c ret = gt215_pll_calc(subdev, &limits, freq, &N, NULL, &M, &P); M 269 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c *coef = (P << 16) | (N << 8) | M; M 67 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c u32 M = (coef & 0x000000ff) >> 0; M 102 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c return sclk / (M * P); M 268 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c int N, M, P, ret; M 278 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c ret = gt215_pll_calc(subdev, &limits, freq, &N, NULL, &M, &P); M 282 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c *coef = (P << 16) | (N << 8) | M; M 112 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c u32 sclk = 0, P = 1, N = 1, M = 1; M 118 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c M = (coef & 0x000000ff) >> 0; M 134 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c MP = M * P; M 241 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c int P, N, M, diff; M 263 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c ret = gt215_pll_calc(subdev, &limits, khz, &N, NULL, &M, &P); M 265 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c info->pll = (P << 16) | (N << 8) | M; M 166 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c u32 clock, int *N, int *M, int *P) M 181 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c return nv04_pll_calc(subdev, &pll, clock, N, M, NULL, NULL, P); M 211 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c int N, M, P1, P2 = 0; M 219 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c clock = calc_pll(clk, 0x4028, (core << 1), &N, &M, &P1); M 234 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c clk->ccoef = (N << 8) | M; M 245 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c clock = calc_pll(clk, 0x4020, shader, &N, &M, &P1); M 256 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c clk->scoef = (N << 8) | M; M 46 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c int M = (ctrl & 0x000000ff) >> 0; M 50 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c khz = ref * N / M; M 58 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c int P, N, M, id; M 77 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c M = ((coef & 0x000000ff) >> 0) + 1; M 85 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c M = (coef & 0x000000ff) >> 0; M 112 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c M = (coef & 0x000000ff) >> 0; M 118 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c if (M) M 119 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c return (ref * N / M) >> P; M 325 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c calc_pll(struct nv50_clk *clk, u32 reg, u32 idx, int *N, int *M, int *P) M 340 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c return nv04_pll_calc(subdev, &pll, idx, N, M, NULL, NULL, P); M 380 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c int N, M, P1, P2; M 459 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c freq = calc_pll(clk, 0x4028, core, &N, &M, &P1); M 465 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c clk_mask(hwsq, nvpll[1], 0x0000ffff, (N << 8) | M); M 477 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c freq = calc_pll(clk, 0x4020, shader, &N, &M, &P1); M 483 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c clk_mask(hwsq, spll[1], 0x0000ffff, (N << 8) | M); M 11 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pll.h int *N, int *fN, int *M, int *P); M 34 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.c int M, lM, hM, N, fN; M 48 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.c for (M = lM; M <= hM; M++) { M 49 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.c u32 tmp = freq * *P * M; M 67 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.c err = abs(freq - (info->refclk * N / M / *P)); M 71 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.c *pM = M; M 49 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c int M, N, thisP, P; M 92 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c for (M = minM; M <= maxM; M++) { M 93 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c if (crystal/M < minU) M 95 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c if (crystal/M > maxU) M 99 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c N = (clkP * M + crystal/2) / crystal; M 107 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c calcclk = ((N * crystal + P/2) / P + M/2) / M; M 116 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c *pM = M; M 37 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c int N, fN, M, P; M 44 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c ret = gt215_pll_calc(subdev, &info, freq, &N, &fN, &M, &P); M 54 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c nvkm_wr32(device, info.reg + 0x04, (P << 16) | (N << 8) | M); M 37 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.c int N, fN, M, P; M 44 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.c ret = gt215_pll_calc(subdev, &info, freq, &N, &fN, &M, &P); M 53 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.c (P << 16) | (M << 8) | N); M 35 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gv100.c int N, fN, M, P; M 42 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gv100.c ret = gt215_pll_calc(subdev, &info, freq, &N, &fN, &M, &P); M 54 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gv100.c (M << 0)); M 35 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/tu102.c int N, fN, M, P; M 42 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/tu102.c ret = gt215_pll_calc(subdev, &info, freq, &N, &fN, &M, &P); M 54 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/tu102.c (M << 0)); M 982 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c gk104_calc_pll_output(int fN, int M, int N, int P, int clk) M 984 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c return ((clk * N) + (((u16)(fN + 4096) * clk) >> 13)) / (M * P); M 73 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c struct bit_entry M; M 155 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c if (!bit_entry(bios, 'M', &M)) M 156 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c nvbios_init(subdev, nvbios_rd16(bios, M.offset + 0x00)); M 567 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_M(b, c, v) SET_CONTEXT_FIELD(b, c, SCTLR, M, v) M 755 drivers/iommu/msm_iommu_hw-8xxx.h #define GET_M(b, c) GET_CONTEXT_FIELD(b, c, SCTLR, M) M 457 drivers/media/dvb-frontends/mb86a16.c int M; M 500 drivers/media/dvb-frontends/mb86a16.c M = f * (1 << R) / 2; M 503 drivers/media/dvb-frontends/mb86a16.c rf_val[1] = (R << 5) | ((M & 0x1f000) >> 12); M 504 drivers/media/dvb-frontends/mb86a16.c rf_val[2] = (M & 0x00ff0) >> 4; M 505 drivers/media/dvb-frontends/mb86a16.c rf_val[3] = ((M & 0x0000f) << 4) | B; M 640 drivers/media/dvb-frontends/mb86a16.c int R, M, fOSC, fOSC_OFS; M 692 drivers/media/dvb-frontends/mb86a16.c M = ((temp1 & 0x1f) << 12) + (temp2 << 4) + (temp3 >> 4); M 694 drivers/media/dvb-frontends/mb86a16.c fOSC = 2 * M; M 696 drivers/media/dvb-frontends/mb86a16.c fOSC = M; M 1770 drivers/media/dvb-frontends/stv0367.c u32 M, N, P; M 1778 drivers/media/dvb-frontends/stv0367.c M = (u32)stv0367_readbits(state, F367CAB_PLL_MDIV); M 1779 drivers/media/dvb-frontends/stv0367.c if (M == 0) M 1780 drivers/media/dvb-frontends/stv0367.c M = M + 1; M 1787 drivers/media/dvb-frontends/stv0367.c mclk_Hz = ((ExtClk_Hz / 2) * N) / (M * (1 << P)); M 286 drivers/media/platform/qcom/camss/camss-vfe-4-1.c #define CALC_WORD(width, M, N) (((width) * (M) + (N) - 1) / (N)) M 322 drivers/media/platform/qcom/camss/camss-vfe-4-7.c #define CALC_WORD(width, M, N) (((width) * (M) + (N) - 1) / (N)) M 123 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(READY, 0x001, ready, msg_req, ready_msg_rsp) \ M 124 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(ATTACH_RESOURCES, 0x002, attach_resources, rsrc_attach, msg_rsp) \ M 125 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(DETACH_RESOURCES, 0x003, detach_resources, rsrc_detach, msg_rsp) \ M 126 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(MSIX_OFFSET, 0x004, msix_offset, msg_req, msix_offset_rsp) \ M 127 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(VF_FLR, 0x006, vf_flr, msg_req, msg_rsp) \ M 129 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(CGX_START_RXTX, 0x200, cgx_start_rxtx, msg_req, msg_rsp) \ M 130 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(CGX_STOP_RXTX, 0x201, cgx_stop_rxtx, msg_req, msg_rsp) \ M 131 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(CGX_STATS, 0x202, cgx_stats, msg_req, cgx_stats_rsp) \ M 132 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(CGX_MAC_ADDR_SET, 0x203, cgx_mac_addr_set, cgx_mac_addr_set_or_get, \ M 134 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(CGX_MAC_ADDR_GET, 0x204, cgx_mac_addr_get, cgx_mac_addr_set_or_get, \ M 136 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(CGX_PROMISC_ENABLE, 0x205, cgx_promisc_enable, msg_req, msg_rsp) \ M 137 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(CGX_PROMISC_DISABLE, 0x206, cgx_promisc_disable, msg_req, msg_rsp) \ M 138 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(CGX_START_LINKEVENTS, 0x207, cgx_start_linkevents, msg_req, msg_rsp) \ M 139 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(CGX_STOP_LINKEVENTS, 0x208, cgx_stop_linkevents, msg_req, msg_rsp) \ M 140 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(CGX_GET_LINKINFO, 0x209, cgx_get_linkinfo, msg_req, cgx_link_info_msg) \ M 141 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(CGX_INTLBK_ENABLE, 0x20A, cgx_intlbk_enable, msg_req, msg_rsp) \ M 142 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(CGX_INTLBK_DISABLE, 0x20B, cgx_intlbk_disable, msg_req, msg_rsp) \ M 144 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NPA_LF_ALLOC, 0x400, npa_lf_alloc, \ M 146 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NPA_LF_FREE, 0x401, npa_lf_free, msg_req, msg_rsp) \ M 147 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NPA_AQ_ENQ, 0x402, npa_aq_enq, npa_aq_enq_req, npa_aq_enq_rsp) \ M 148 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NPA_HWCTX_DISABLE, 0x403, npa_hwctx_disable, hwctx_disable_req, msg_rsp)\ M 153 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NPC_MCAM_ALLOC_ENTRY, 0x6000, npc_mcam_alloc_entry, npc_mcam_alloc_entry_req,\ M 155 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NPC_MCAM_FREE_ENTRY, 0x6001, npc_mcam_free_entry, \ M 157 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NPC_MCAM_WRITE_ENTRY, 0x6002, npc_mcam_write_entry, \ M 159 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NPC_MCAM_ENA_ENTRY, 0x6003, npc_mcam_ena_entry, \ M 161 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NPC_MCAM_DIS_ENTRY, 0x6004, npc_mcam_dis_entry, \ M 163 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NPC_MCAM_SHIFT_ENTRY, 0x6005, npc_mcam_shift_entry, npc_mcam_shift_entry_req,\ M 165 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NPC_MCAM_ALLOC_COUNTER, 0x6006, npc_mcam_alloc_counter, \ M 168 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NPC_MCAM_FREE_COUNTER, 0x6007, npc_mcam_free_counter, \ M 170 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NPC_MCAM_UNMAP_COUNTER, 0x6008, npc_mcam_unmap_counter, \ M 172 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NPC_MCAM_CLEAR_COUNTER, 0x6009, npc_mcam_clear_counter, \ M 174 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NPC_MCAM_COUNTER_STATS, 0x600a, npc_mcam_counter_stats, \ M 177 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NPC_MCAM_ALLOC_AND_WRITE_ENTRY, 0x600b, npc_mcam_alloc_and_write_entry, \ M 180 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NPC_GET_KEX_CFG, 0x600c, npc_get_kex_cfg, \ M 183 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NIX_LF_ALLOC, 0x8000, nix_lf_alloc, \ M 185 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NIX_LF_FREE, 0x8001, nix_lf_free, msg_req, msg_rsp) \ M 186 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NIX_AQ_ENQ, 0x8002, nix_aq_enq, nix_aq_enq_req, nix_aq_enq_rsp) \ M 187 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NIX_HWCTX_DISABLE, 0x8003, nix_hwctx_disable, \ M 189 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NIX_TXSCH_ALLOC, 0x8004, nix_txsch_alloc, \ M 191 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NIX_TXSCH_FREE, 0x8005, nix_txsch_free, nix_txsch_free_req, msg_rsp) \ M 192 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NIX_TXSCHQ_CFG, 0x8006, nix_txschq_cfg, nix_txschq_config, msg_rsp) \ M 193 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NIX_STATS_RST, 0x8007, nix_stats_rst, msg_req, msg_rsp) \ M 194 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NIX_VTAG_CFG, 0x8008, nix_vtag_cfg, nix_vtag_config, msg_rsp) \ M 195 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NIX_RSS_FLOWKEY_CFG, 0x8009, nix_rss_flowkey_cfg, \ M 198 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NIX_SET_MAC_ADDR, 0x800a, nix_set_mac_addr, nix_set_mac_addr, msg_rsp) \ M 199 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NIX_SET_RX_MODE, 0x800b, nix_set_rx_mode, nix_rx_mode, msg_rsp) \ M 200 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NIX_SET_HW_FRS, 0x800c, nix_set_hw_frs, nix_frs_cfg, msg_rsp) \ M 201 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NIX_LF_START_RX, 0x800d, nix_lf_start_rx, msg_req, msg_rsp) \ M 202 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NIX_LF_STOP_RX, 0x800e, nix_lf_stop_rx, msg_req, msg_rsp) \ M 203 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NIX_MARK_FORMAT_CFG, 0x800f, nix_mark_format_cfg, \ M 206 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NIX_SET_RX_CFG, 0x8010, nix_set_rx_cfg, nix_rx_cfg, msg_rsp) \ M 207 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NIX_LSO_FORMAT_CFG, 0x8011, nix_lso_format_cfg, \ M 210 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(NIX_RXVLAN_ALLOC, 0x8012, nix_rxvlan_alloc, msg_req, msg_rsp) M 214 drivers/net/ethernet/marvell/octeontx2/af/mbox.h M(CGX_LINK_EVENT, 0xC00, cgx_link_event, cgx_link_info_msg, msg_rsp) M 430 drivers/net/wireless/ath/ath9k/ar9003_paprd.c int G_fxp, Y_intercept, order_x_by_y, M, I, L, sum_y_sqr, sum_y_quad; M 545 drivers/net/wireless/ath/ath9k/ar9003_paprd.c M = 10; M 547 drivers/net/wireless/ath/ath9k/ar9003_paprd.c M = 9; M 549 drivers/net/wireless/ath/ath9k/ar9003_paprd.c M = 8; M 572 drivers/net/wireless/ath/ath9k/ar9003_paprd.c (x_est_fxp1_nonlin * (1 << M) + y_est[i + I]) / y_est[i + M 575 drivers/net/wireless/ath/ath9k/ar9003_paprd.c (x_tilde[i] * (1 << M) + y_est[i + I]) / y_est[i + I]; M 577 drivers/net/wireless/ath/ath9k/ar9003_paprd.c (x_tilde[i] * (1 << M) + y_est[i + I]) / y_est[i + I]; M 638 drivers/net/wireless/ath/ath9k/ar9003_paprd.c order_1 = 3 * M - Q_x - Q_B1 - Q_beta + 10 + Q_scale_B; M 639 drivers/net/wireless/ath/ath9k/ar9003_paprd.c order_2 = 3 * M - Q_x - Q_B2 - Q_alpha + 10 + Q_scale_B; M 675 drivers/net/wireless/ath/ath9k/ar9003_paprd.c ((theta[i + I] << M) + y_est[i + I]) / y_est[i + I]; M 677 drivers/net/wireless/ath/ath9k/ar9003_paprd.c ((theta_tilde << M) + y_est[i + I]) / y_est[i + I]; M 679 drivers/net/wireless/ath/ath9k/ar9003_paprd.c ((theta_tilde << M) + y_est[i + I]) / y_est[i + I]; M 691 drivers/net/wireless/ath/ath9k/ar9003_paprd.c order_1 = 3 * M - Q_x - Q_B1 - Q_beta + 10 + Q_scale_B + 5; M 692 drivers/net/wireless/ath/ath9k/ar9003_paprd.c order_2 = 3 * M - Q_x - Q_B2 - Q_alpha + 10 + Q_scale_B + 5; M 80 drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 0), M 84 drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 1), M 88 drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 2), M 93 drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 3), M 97 drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 4), M 68 drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 0), M 72 drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 1), M 76 drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 2), M 81 drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 3), M 85 drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 4), M 89 drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 5), M 93 drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 6), M 97 drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 7), M 74 drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 0), M 78 drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 1), M 82 drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 2), M 86 drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 3), M 90 drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 4), M 97 drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 8), M 102 drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 9), M 107 drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 10), M 112 drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 11), M 117 drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 12), M 122 drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 13), M 127 drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 14), M 132 drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 15), M 1230 drivers/scsi/ncr53c8xx.h #define MASK(D,M) (0x00040000 | (((M ^ 0xff) & 0xff) << 8ul)|((D) & 0xff)) M 713 drivers/scsi/sym53c8xx_2/sym_defs.h #define MASK(D,M) (0x00040000 | (((M ^ 0xff) & 0xff) << 8ul)|((D) & 0xff)) M 59 drivers/staging/comedi/drivers/ni_routing/tools/convert_c_to_py.c const char *M; M 64 drivers/staging/comedi/drivers/ni_routing/tools/convert_c_to_py.c M = "V"; M 66 drivers/staging/comedi/drivers/ni_routing/tools/convert_c_to_py.c M = "I"; M 68 drivers/staging/comedi/drivers/ni_routing/tools/convert_c_to_py.c M = "U"; M 77 drivers/staging/comedi/drivers/ni_routing/tools/convert_c_to_py.c src, M, UNMARK(r)); M 284 drivers/staging/rtl8188eu/core/rtw_security.c pmicdata->M = 0; M 299 drivers/staging/rtl8188eu/core/rtw_security.c pmicdata->M |= ((unsigned long)b) << (8*pmicdata->nBytesInM); M 303 drivers/staging/rtl8188eu/core/rtw_security.c pmicdata->L ^= pmicdata->M; M 313 drivers/staging/rtl8188eu/core/rtw_security.c pmicdata->M = 0; M 230 drivers/staging/rtl8188eu/include/rtw_security.h u32 M; /* Message accumulator (single word) */ M 273 drivers/staging/rtl8712/rtl871x_security.c pmicdata->M = 0; M 288 drivers/staging/rtl8712/rtl871x_security.c pmicdata->M |= ((u32)b) << (8 * pmicdata->nBytesInM); M 292 drivers/staging/rtl8712/rtl871x_security.c pmicdata->L ^= pmicdata->M; M 303 drivers/staging/rtl8712/rtl871x_security.c pmicdata->M = 0; M 194 drivers/staging/rtl8712/rtl871x_security.h u32 M; /* Message accumulator (single word) */ M 347 drivers/staging/rtl8723bs/core/rtw_security.c pmicdata->M = 0; M 362 drivers/staging/rtl8723bs/core/rtw_security.c pmicdata->M |= ((unsigned long)b) << (8*pmicdata->nBytesInM); M 366 drivers/staging/rtl8723bs/core/rtw_security.c pmicdata->L ^= pmicdata->M; M 376 drivers/staging/rtl8723bs/core/rtw_security.c pmicdata->M = 0; M 280 drivers/staging/rtl8723bs/include/rtw_security.h u32 M; /* Message accumulator (single word) */ M 37 drivers/staging/sm750fb/ddk750_chip.c unsigned int M, N, OD, POD; M 43 drivers/staging/sm750fb/ddk750_chip.c M = (pll_reg & PLL_CTRL_M_MASK) >> PLL_CTRL_M_SHIFT; M 48 drivers/staging/sm750fb/ddk750_chip.c return DEFAULT_INPUT_CLOCK * M / N / BIT(OD) / BIT(POD); M 320 drivers/staging/sm750fb/ddk750_chip.c int N, M, X, d; M 361 drivers/staging/sm750fb/ddk750_chip.c M = quo * X; M 362 drivers/staging/sm750fb/ddk750_chip.c M += fl_quo * X / 10000; M 364 drivers/staging/sm750fb/ddk750_chip.c M += (fl_quo * X % 10000) > 5000 ? 1 : 0; M 365 drivers/staging/sm750fb/ddk750_chip.c if (M < 256 && M > 0) { M 368 drivers/staging/sm750fb/ddk750_chip.c tmp_clock = pll->inputFreq * M / N / X; M 371 drivers/staging/sm750fb/ddk750_chip.c pll->M = M; M 392 drivers/staging/sm750fb/ddk750_chip.c unsigned int M = pPLL->M; M 407 drivers/staging/sm750fb/ddk750_chip.c ((M << PLL_CTRL_M_SHIFT) & PLL_CTRL_M_MASK); M 47 drivers/staging/sm750fb/ddk750_chip.h unsigned long M; M 961 drivers/video/fbdev/aty/aty128fb.c u32 Nx, M; M 972 drivers/video/fbdev/aty/aty128fb.c M = x_mpll_ref_fb_div & 0x0000ff; M 975 drivers/video/fbdev/aty/aty128fb.c (M * PostDivSet[xclk_cntl])); M 3034 drivers/video/fbdev/aty/atyfb_base.c unsigned int N, P, Q, M, T, R; M 3065 drivers/video/fbdev/aty/atyfb_base.c M = pll_regs[PLL_REF_DIV]; M 3097 drivers/video/fbdev/aty/atyfb_base.c T = 2 * Q * R / M; M 581 drivers/video/fbdev/aty/radeon_base.c unsigned Ns, Nm, M; M 696 drivers/video/fbdev/aty/radeon_base.c M = (tmp & 0xff); M 697 drivers/video/fbdev/aty/radeon_base.c sclk = round_div((2 * Ns * xtal), (2 * M)); M 698 drivers/video/fbdev/aty/radeon_base.c mclk = round_div((2 * Nm * xtal), (2 * M)); M 539 drivers/video/fbdev/gbefb.c SET_GBE_FIELD(DOTCLK, M, val, timing->pll_m - 1); M 212 drivers/video/fbdev/i810/i810.h u32 pixclock, M, N, P; M 235 drivers/video/fbdev/i810/i810_main.c tmp1 = par->regs.M | par->regs.N << 16; M 1178 drivers/video/fbdev/i810/i810_main.c i810_calc_dclk(var->pixclock, &par->regs.M, M 144 drivers/video/fbdev/nvidia/nv_hw.c unsigned int pll, N, M, MB, NB, P; M 150 drivers/video/fbdev/nvidia/nv_hw.c M = pll & 0xFF; M 160 drivers/video/fbdev/nvidia/nv_hw.c *MClk = ((N * NB * par->CrystalFreqKHz) / (M * MB)) >> P; M 165 drivers/video/fbdev/nvidia/nv_hw.c M = pll & 0xFF; M 170 drivers/video/fbdev/nvidia/nv_hw.c *NVClk = ((N * NB * par->CrystalFreqKHz) / (M * MB)) >> P; M 173 drivers/video/fbdev/nvidia/nv_hw.c M = pll & 0xFF; M 184 drivers/video/fbdev/nvidia/nv_hw.c *MClk = ((N * NB * par->CrystalFreqKHz) / (M * MB)) >> P; M 187 drivers/video/fbdev/nvidia/nv_hw.c M = pll & 0xFF; M 198 drivers/video/fbdev/nvidia/nv_hw.c *NVClk = ((N * NB * par->CrystalFreqKHz) / (M * MB)) >> P; M 203 drivers/video/fbdev/nvidia/nv_hw.c M = pll & 0x0F; M 213 drivers/video/fbdev/nvidia/nv_hw.c *MClk = ((N * NB * par->CrystalFreqKHz) / (M * MB)) >> P; M 216 drivers/video/fbdev/nvidia/nv_hw.c M = pll & 0x0F; M 226 drivers/video/fbdev/nvidia/nv_hw.c *NVClk = ((N * NB * par->CrystalFreqKHz) / (M * MB)) >> P; M 229 drivers/video/fbdev/nvidia/nv_hw.c M = pll & 0xFF; M 232 drivers/video/fbdev/nvidia/nv_hw.c *MClk = (N * par->CrystalFreqKHz / M) >> P; M 235 drivers/video/fbdev/nvidia/nv_hw.c M = pll & 0xFF; M 238 drivers/video/fbdev/nvidia/nv_hw.c *NVClk = (N * par->CrystalFreqKHz / M) >> P; M 684 drivers/video/fbdev/nvidia/nv_hw.c unsigned int M, N, P, pll, MClk, NVClk, memctrl; M 704 drivers/video/fbdev/nvidia/nv_hw.c M = (pll >> 0) & 0xFF; M 707 drivers/video/fbdev/nvidia/nv_hw.c NVClk = (N * par->CrystalFreqKHz / M) >> P; M 772 drivers/video/fbdev/nvidia/nv_hw.c unsigned M, N, P; M 789 drivers/video/fbdev/nvidia/nv_hw.c for (M = lowM; M <= highM; M++) { M 790 drivers/video/fbdev/nvidia/nv_hw.c N = ((VClk << P) * M) / par->CrystalFreqKHz; M 794 drivers/video/fbdev/nvidia/nv_hw.c M) >> P; M 801 drivers/video/fbdev/nvidia/nv_hw.c (P << 16) | (N << 8) | M; M 818 drivers/video/fbdev/nvidia/nv_hw.c unsigned M, N, P; M 829 drivers/video/fbdev/nvidia/nv_hw.c for (M = 1; M <= 13; M++) { M 830 drivers/video/fbdev/nvidia/nv_hw.c N = ((VClk << P) * M) / M 835 drivers/video/fbdev/nvidia/nv_hw.c M) >> P; M 842 drivers/video/fbdev/nvidia/nv_hw.c (P << 16) | (N << 8) | M; M 619 drivers/video/fbdev/riva/riva_hw.c unsigned int M, N, P, pll, MClk; M 622 drivers/video/fbdev/riva/riva_hw.c M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F; M 623 drivers/video/fbdev/riva/riva_hw.c MClk = (N * chip->CrystalFreqKHz / M) >> P; M 808 drivers/video/fbdev/riva/riva_hw.c unsigned int M, N, P, pll, MClk, NVClk, cfg1; M 811 drivers/video/fbdev/riva/riva_hw.c M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F; M 812 drivers/video/fbdev/riva/riva_hw.c MClk = (N * chip->CrystalFreqKHz / M) >> P; M 814 drivers/video/fbdev/riva/riva_hw.c M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F; M 815 drivers/video/fbdev/riva/riva_hw.c NVClk = (N * chip->CrystalFreqKHz / M) >> P; M 1071 drivers/video/fbdev/riva/riva_hw.c unsigned int M, N, P, pll, MClk, NVClk, cfg1; M 1074 drivers/video/fbdev/riva/riva_hw.c M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F; M 1075 drivers/video/fbdev/riva/riva_hw.c MClk = (N * chip->CrystalFreqKHz / M) >> P; M 1077 drivers/video/fbdev/riva/riva_hw.c M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F; M 1078 drivers/video/fbdev/riva/riva_hw.c NVClk = (N * chip->CrystalFreqKHz / M) >> P; M 1117 drivers/video/fbdev/riva/riva_hw.c unsigned int M, N, P, pll, MClk, NVClk; M 1131 drivers/video/fbdev/riva/riva_hw.c M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F; M 1132 drivers/video/fbdev/riva/riva_hw.c NVClk = (N * chip->CrystalFreqKHz / M) >> P; M 1183 drivers/video/fbdev/riva/riva_hw.c unsigned M, N, P; M 1206 drivers/video/fbdev/riva/riva_hw.c for (M = lowM; M <= highM; M++) M 1208 drivers/video/fbdev/riva/riva_hw.c N = (VClk << P) * M / chip->CrystalFreqKHz; M 1210 drivers/video/fbdev/riva/riva_hw.c Freq = (chip->CrystalFreqKHz * N / M) >> P; M 1217 drivers/video/fbdev/riva/riva_hw.c *mOut = M; M 388 drivers/video/fbdev/stifb.c #define IBOvals(R,M,X,S,D,L,B,F) \ M 389 drivers/video/fbdev/stifb.c (((R)<<8)|((M)<<16)|((X)<<24)|((S)<<29)|((D)<<28)|((L)<<31)|((B)<<1)|(F)) M 1164 drivers/video/fbdev/w100fb.c w100_pwr_state.pll_ref_fb_div.f.pll_ref_div = pll->M; M 132 include/linux/poll.h return M(IN) | M(OUT) | M(PRI) | M(ERR) | M(NVAL) | M 133 include/linux/poll.h M(RDNORM) | M(RDBAND) | M(WRNORM) | M(WRBAND) | M 134 include/linux/poll.h M(HUP) | M(RDHUP) | M(MSG); M 141 include/linux/poll.h return M(IN) | M(OUT) | M(PRI) | M(ERR) | M(NVAL) | M 142 include/linux/poll.h M(RDNORM) | M(RDBAND) | M(WRNORM) | M(WRBAND) | M 143 include/linux/poll.h M(HUP) | M(RDHUP) | M(MSG); M 94 include/video/w100fb.h uint8_t M; /* input divider */ M 1029 sound/pci/riptide/riptide.c u32 D, M, N; M 1036 sound/pci/riptide/riptide.c M = ((rate == 48000) ? 47999 : rate) * 65536; M 1037 sound/pci/riptide/riptide.c N = M % D; M 1038 sound/pci/riptide/riptide.c M /= D; M 1042 sound/pci/riptide/riptide.c SEND_SSRC(cif, *intdec, D, M, N); M 1045 sound/pci/riptide/riptide.c rptr.retwords[2] != M && M 125 tools/bpf/bpf_dbg.c uint32_t M[BPF_MEMWORDS]; M 461 tools/bpf/bpf_dbg.c if (r->M[i]) { M 463 tools/bpf/bpf_dbg.c rl_printf("M[%d]: [%#08x][%u]\n", i, r->M[i], r->M[i]); M 659 tools/bpf/bpf_dbg.c r->M[K] = r->A; M 662 tools/bpf/bpf_dbg.c r->M[K] = r->X; M 725 tools/bpf/bpf_dbg.c r->A = r->M[K]; M 728 tools/bpf/bpf_dbg.c r->X = r->M[K]; M 57 tools/perf/tests/kmod-path.c M("/xxxx/xxxx/x-x.ko", PERF_RECORD_MISC_CPUMODE_UNKNOWN, true); M 58 tools/perf/tests/kmod-path.c M("/xxxx/xxxx/x-x.ko", PERF_RECORD_MISC_KERNEL, true); M 59 tools/perf/tests/kmod-path.c M("/xxxx/xxxx/x-x.ko", PERF_RECORD_MISC_USER, false); M 67 tools/perf/tests/kmod-path.c M("/xxxx/xxxx/x.ko.gz", PERF_RECORD_MISC_CPUMODE_UNKNOWN, true); M 68 tools/perf/tests/kmod-path.c M("/xxxx/xxxx/x.ko.gz", PERF_RECORD_MISC_KERNEL, true); M 69 tools/perf/tests/kmod-path.c M("/xxxx/xxxx/x.ko.gz", PERF_RECORD_MISC_USER, false); M 76 tools/perf/tests/kmod-path.c M("/xxxx/xxxx/x.gz", PERF_RECORD_MISC_CPUMODE_UNKNOWN, false); M 77 tools/perf/tests/kmod-path.c M("/xxxx/xxxx/x.gz", PERF_RECORD_MISC_KERNEL, false); M 78 tools/perf/tests/kmod-path.c M("/xxxx/xxxx/x.gz", PERF_RECORD_MISC_USER, false); M 85 tools/perf/tests/kmod-path.c M("x.gz", PERF_RECORD_MISC_CPUMODE_UNKNOWN, false); M 86 tools/perf/tests/kmod-path.c M("x.gz", PERF_RECORD_MISC_KERNEL, false); M 87 tools/perf/tests/kmod-path.c M("x.gz", PERF_RECORD_MISC_USER, false); M 94 tools/perf/tests/kmod-path.c M("x.ko.gz", PERF_RECORD_MISC_CPUMODE_UNKNOWN, true); M 95 tools/perf/tests/kmod-path.c M("x.ko.gz", PERF_RECORD_MISC_KERNEL, true); M 96 tools/perf/tests/kmod-path.c M("x.ko.gz", PERF_RECORD_MISC_USER, false); M 104 tools/perf/tests/kmod-path.c M("[test_module]", PERF_RECORD_MISC_CPUMODE_UNKNOWN, true); M 105 tools/perf/tests/kmod-path.c M("[test_module]", PERF_RECORD_MISC_KERNEL, true); M 106 tools/perf/tests/kmod-path.c M("[test_module]", PERF_RECORD_MISC_USER, false); M 113 tools/perf/tests/kmod-path.c M("[test.module]", PERF_RECORD_MISC_CPUMODE_UNKNOWN, true); M 114 tools/perf/tests/kmod-path.c M("[test.module]", PERF_RECORD_MISC_KERNEL, true); M 115 tools/perf/tests/kmod-path.c M("[test.module]", PERF_RECORD_MISC_USER, false); M 122 tools/perf/tests/kmod-path.c M("[vdso]", PERF_RECORD_MISC_CPUMODE_UNKNOWN, false); M 123 tools/perf/tests/kmod-path.c M("[vdso]", PERF_RECORD_MISC_KERNEL, false); M 124 tools/perf/tests/kmod-path.c M("[vdso]", PERF_RECORD_MISC_USER, false); M 130 tools/perf/tests/kmod-path.c M("[vdso32]", PERF_RECORD_MISC_CPUMODE_UNKNOWN, false); M 131 tools/perf/tests/kmod-path.c M("[vdso32]", PERF_RECORD_MISC_KERNEL, false); M 132 tools/perf/tests/kmod-path.c M("[vdso32]", PERF_RECORD_MISC_USER, false); M 138 tools/perf/tests/kmod-path.c M("[vdsox32]", PERF_RECORD_MISC_CPUMODE_UNKNOWN, false); M 139 tools/perf/tests/kmod-path.c M("[vdsox32]", PERF_RECORD_MISC_KERNEL, false); M 140 tools/perf/tests/kmod-path.c M("[vdsox32]", PERF_RECORD_MISC_USER, false); M 147 tools/perf/tests/kmod-path.c M("[vsyscall]", PERF_RECORD_MISC_CPUMODE_UNKNOWN, false); M 148 tools/perf/tests/kmod-path.c M("[vsyscall]", PERF_RECORD_MISC_KERNEL, false); M 149 tools/perf/tests/kmod-path.c M("[vsyscall]", PERF_RECORD_MISC_USER, false); M 156 tools/perf/tests/kmod-path.c M("[kernel.kallsyms]", PERF_RECORD_MISC_CPUMODE_UNKNOWN, false); M 157 tools/perf/tests/kmod-path.c M("[kernel.kallsyms]", PERF_RECORD_MISC_KERNEL, false); M 158 tools/perf/tests/kmod-path.c M("[kernel.kallsyms]", PERF_RECORD_MISC_USER, false); M 30 tools/perf/util/c++/clang-test.cpp std::unique_ptr<llvm::Module> M = M 34 tools/perf/util/c++/clang-test.cpp return M; M 42 tools/perf/util/c++/clang-test.cpp auto M = __test__clang_to_IR(); M 43 tools/perf/util/c++/clang-test.cpp if (!M) M 45 tools/perf/util/c++/clang-test.cpp for (llvm::Function& F : *M) M 55 tools/perf/util/c++/clang-test.cpp auto M = __test__clang_to_IR(); M 56 tools/perf/util/c++/clang-test.cpp if (!M) M 59 tools/perf/util/c++/clang-test.cpp auto Buffer = perf::getBPFObjectFromModule(&*M); M 194 tools/perf/util/c++/clang.cpp auto M = getModuleFromSource(std::move(CFlags), filename); M 195 tools/perf/util/c++/clang.cpp if (!M) M 197 tools/perf/util/c++/clang.cpp auto O = getBPFObjectFromModule(&*M);