L_ADDRREG 159 drivers/net/ethernet/amd/ni65.c #define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);inw(PORT+L_ADDRREG); \ L_ADDRREG 161 drivers/net/ethernet/amd/ni65.c #define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_ADDRREG),\ L_ADDRREG 169 drivers/net/ethernet/amd/ni65.c #define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);outw(val,PORT+L_DATAREG);} L_ADDRREG 170 drivers/net/ethernet/amd/ni65.c #define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_DATAREG)) L_ADDRREG 278 drivers/net/ethernet/amd/ni65.c outw(80,PORT+L_ADDRREG); L_ADDRREG 279 drivers/net/ethernet/amd/ni65.c if(inw(PORT+L_ADDRREG) != 80) L_ADDRREG 283 drivers/net/ethernet/amd/ni65.c outw(0,PORT+L_ADDRREG); L_ADDRREG 285 drivers/net/ethernet/amd/ni65.c outw(1,PORT+L_ADDRREG); L_ADDRREG 288 drivers/net/ethernet/amd/ni65.c outw(CSR0,PORT+L_ADDRREG); /* switch back to CSR0 */ L_ADDRREG 469 drivers/net/ethernet/amd/ni65.c outw(88,PORT+L_ADDRREG); L_ADDRREG 470 drivers/net/ethernet/amd/ni65.c if(inw(PORT+L_ADDRREG) == 88) { L_ADDRREG 474 drivers/net/ethernet/amd/ni65.c outw(89,PORT+L_ADDRREG);