LVDS_PORT_EN      742 drivers/gpu/drm/gma500/cdv_intel_display.c 		    LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP |
LVDS_PORT_EN      858 drivers/gpu/drm/gma500/cdv_intel_display.c 		is_lvds = (pipe == 1) && (REG_READ(LVDS) & LVDS_PORT_EN);
LVDS_PORT_EN      868 drivers/gpu/drm/gma500/cdv_intel_display.c 				(dev_priv->regs.psb.saveLVDS & LVDS_PORT_EN);
LVDS_PORT_EN      711 drivers/gpu/drm/gma500/cdv_intel_lvds.c 	if (crtc && (lvds & LVDS_PORT_EN)) {
LVDS_PORT_EN      710 drivers/gpu/drm/gma500/gma_display.c 	    (REG_READ(LVDS) & LVDS_PORT_EN) != 0) {
LVDS_PORT_EN      102 drivers/gpu/drm/gma500/oaktrail_lvds.c 		    LVDS_PORT_EN |
LVDS_PORT_EN      230 drivers/gpu/drm/gma500/psb_intel_display.c 		lvds |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
LVDS_PORT_EN      316 drivers/gpu/drm/gma500/psb_intel_display.c 		is_lvds = (pipe == 1) && (REG_READ(LVDS) & LVDS_PORT_EN);
LVDS_PORT_EN      327 drivers/gpu/drm/gma500/psb_intel_display.c 								LVDS_PORT_EN);
LVDS_PORT_EN      776 drivers/gpu/drm/gma500/psb_intel_lvds.c 	if (crtc && (lvds & LVDS_PORT_EN)) {
LVDS_PORT_EN     11339 drivers/gpu/drm/i915/display/intel_display.c 		bool is_lvds = (pipe == 1) && (lvds & LVDS_PORT_EN);
LVDS_PORT_EN       96 drivers/gpu/drm/i915/display/intel_lvds.c 	return val & LVDS_PORT_EN;
LVDS_PORT_EN      249 drivers/gpu/drm/i915/display/intel_lvds.c 	temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
LVDS_PORT_EN      316 drivers/gpu/drm/i915/display/intel_lvds.c 	I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
LVDS_PORT_EN      338 drivers/gpu/drm/i915/display/intel_lvds.c 	I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
LVDS_PORT_EN      854 drivers/gpu/drm/i915/display/intel_lvds.c 		if ((lvds & LVDS_PORT_EN) == 0) {