LTQ_STATUS_BASE_ADDR   34 arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h #define FALCON_CHIPID		((u32 *)(KSEG1 + LTQ_STATUS_BASE_ADDR + 0x0c))
LTQ_STATUS_BASE_ADDR   35 arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h #define FALCON_CHIPTYPE		((u32 *)(KSEG1 + LTQ_STATUS_BASE_ADDR + 0x38))
LTQ_STATUS_BASE_ADDR   36 arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h #define FALCON_CHIPCONF		((u32 *)(KSEG1 + LTQ_STATUS_BASE_ADDR + 0x40))