LTQ_DMA_CCTRL      97 arch/mips/lantiq/xway/dma.c 	ltq_dma_w32_mask(0, DMA_CHAN_ON, LTQ_DMA_CCTRL);
LTQ_DMA_CCTRL     109 arch/mips/lantiq/xway/dma.c 	ltq_dma_w32_mask(DMA_CHAN_ON, 0, LTQ_DMA_CCTRL);
LTQ_DMA_CCTRL     129 arch/mips/lantiq/xway/dma.c 	ltq_dma_w32_mask(DMA_CHAN_ON, 0, LTQ_DMA_CCTRL);
LTQ_DMA_CCTRL     131 arch/mips/lantiq/xway/dma.c 	ltq_dma_w32_mask(0, DMA_CHAN_RST, LTQ_DMA_CCTRL);
LTQ_DMA_CCTRL     132 arch/mips/lantiq/xway/dma.c 	while (ltq_dma_r32(LTQ_DMA_CCTRL) & DMA_CHAN_RST)
LTQ_DMA_CCTRL     147 arch/mips/lantiq/xway/dma.c 	ltq_dma_w32(DMA_WEIGHT | DMA_TX, LTQ_DMA_CCTRL);
LTQ_DMA_CCTRL     162 arch/mips/lantiq/xway/dma.c 	ltq_dma_w32(DMA_WEIGHT, LTQ_DMA_CCTRL);
LTQ_DMA_CCTRL     230 arch/mips/lantiq/xway/dma.c 		ltq_dma_w32(DMA_CHAN_RST, LTQ_DMA_CCTRL);
LTQ_DMA_CCTRL     232 arch/mips/lantiq/xway/dma.c 		ltq_dma_w32_mask(DMA_CHAN_ON, 0, LTQ_DMA_CCTRL);