LSP0_TIMER5_CLK   707 drivers/clk/zte/clk-zx296718.c 	MUX(0, "timer5_wclk_mux", lsp0_wclk_timer5_p, LSP0_TIMER5_CLK, 4, 1),
LSP0_TIMER5_CLK   722 drivers/clk/zte/clk-zx296718.c 	GATE(LSP0_TIMER5_WCLK, "timer5_wclk", "timer5_wclk_mux", LSP0_TIMER5_CLK, 1, CLK_SET_RATE_PARENT, 0),
LSP0_TIMER5_CLK   737 drivers/clk/zte/clk-zx296718.c 	DIV_T(0, "timer5_div", "lsp0_24m", LSP0_TIMER5_CLK,  12, 4, 0, common_even_div_table),