LSP0_TIMER3_CLK 705 drivers/clk/zte/clk-zx296718.c MUX(0, "timer3_wclk_mux", lsp0_wclk_timer3_p, LSP0_TIMER3_CLK, 4, 1), LSP0_TIMER3_CLK 720 drivers/clk/zte/clk-zx296718.c GATE(LSP0_TIMER3_WCLK, "timer3_wclk", "timer3_wclk_mux", LSP0_TIMER3_CLK, 1, CLK_SET_RATE_PARENT, 0), LSP0_TIMER3_CLK 735 drivers/clk/zte/clk-zx296718.c DIV_T(0, "timer3_div", "lsp0_24m", LSP0_TIMER3_CLK, 12, 4, 0, common_even_div_table),