LSCSA_QW_OFFSET    78 arch/powerpc/platforms/cell/spufs/spu_restore.c 	offset = LSCSA_QW_OFFSET(decr_status);
LSCSA_QW_OFFSET    81 arch/powerpc/platforms/cell/spufs/spu_restore.c 		offset = LSCSA_QW_OFFSET(decr);
LSCSA_QW_OFFSET    96 arch/powerpc/platforms/cell/spufs/spu_restore.c 	offset = LSCSA_QW_OFFSET(ppu_mb);
LSCSA_QW_OFFSET   110 arch/powerpc/platforms/cell/spufs/spu_restore.c 	offset = LSCSA_QW_OFFSET(ppuint_mb);
LSCSA_QW_OFFSET   124 arch/powerpc/platforms/cell/spufs/spu_restore.c 	offset = LSCSA_QW_OFFSET(fpcr);
LSCSA_QW_OFFSET   137 arch/powerpc/platforms/cell/spufs/spu_restore.c 	offset = LSCSA_QW_OFFSET(srr0);
LSCSA_QW_OFFSET   150 arch/powerpc/platforms/cell/spufs/spu_restore.c 	offset = LSCSA_QW_OFFSET(event_mask);
LSCSA_QW_OFFSET   163 arch/powerpc/platforms/cell/spufs/spu_restore.c 	offset = LSCSA_QW_OFFSET(tag_mask);
LSCSA_QW_OFFSET   191 arch/powerpc/platforms/cell/spufs/spu_restore.c 	offset = LSCSA_QW_OFFSET(stopped_status);
LSCSA_QW_OFFSET    32 arch/powerpc/platforms/cell/spufs/spu_save.c 	offset = LSCSA_QW_OFFSET(event_mask);
LSCSA_QW_OFFSET    43 arch/powerpc/platforms/cell/spufs/spu_save.c 	offset = LSCSA_QW_OFFSET(tag_mask);
LSCSA_QW_OFFSET    76 arch/powerpc/platforms/cell/spufs/spu_save.c 	offset = LSCSA_QW_OFFSET(fpcr);
LSCSA_QW_OFFSET    88 arch/powerpc/platforms/cell/spufs/spu_save.c 	offset = LSCSA_QW_OFFSET(decr);
LSCSA_QW_OFFSET   100 arch/powerpc/platforms/cell/spufs/spu_save.c 	offset = LSCSA_QW_OFFSET(srr0);