LS                456 arch/powerpc/xmon/ppc-opc.c #define WC LS
LS                460 arch/powerpc/xmon/ppc-opc.c #define ME LS + 1
LS               5848 arch/powerpc/xmon/ppc-opc.c {"sync",	X(31,598),     XSYNCLE_MASK, E6500,	0,		{LS, ESYNC}},
LS               5849 arch/powerpc/xmon/ppc-opc.c {"sync",	X(31,598),     XSYNC_MASK,   PPCCOM,	BOOKE|PPC476,	{LS}},
LS                130 arch/powerpc/xmon/spu-insns.h APUOP(M_LQA,		RI16,	0x184,	"lqa",		_A2(A_T,A_S18),	00002,	LS)	/* LoadQAbs      RT<-M[I16] */
LS                131 arch/powerpc/xmon/spu-insns.h APUOP(M_LQR,		RI16,	0x19C,	"lqr",		_A2(A_T,A_R18),	00002,	LS)	/* LoadQRel      RT<-M[IP+I16] */
LS                141 arch/powerpc/xmon/spu-insns.h APUOP(M_HBRA,		LBT,	0x080,	"hbra",		_A2(A_S11,A_S18),	00000,	LS)	/* HBRA          BTB[B9]<-M[I16] */
LS                142 arch/powerpc/xmon/spu-insns.h APUOP(M_HBRR,		LBT,	0x090,	"hbrr",		_A2(A_S11,A_R18),	00000,	LS)	/* HBRR          BTB[B9]<-M[IP+I16] */
LS                147 arch/powerpc/xmon/spu-insns.h APUOP(M_STQA,		RI16,	0x104,	"stqa",		_A2(A_T,A_S18),	00001,	LS)	/* SToreQAbs     M[I16]<-RT */
LS                148 arch/powerpc/xmon/spu-insns.h APUOP(M_STQR,		RI16,	0x11C,	"stqr",		_A2(A_T,A_R18),	00001,	LS)	/* SToreQRel     M[IP+I16]<-RT */
LS                151 arch/powerpc/xmon/spu-insns.h APUOP(M_LQD,		RI10,	0x1a0,	"lqd",		_A4(A_T,A_S14,A_P,A_A),	00012,	LS)	/* LoadQDisp     RT<-M[Ra+I10] */
LS                157 arch/powerpc/xmon/spu-insns.h APUOP(M_HBR,		LBTI,	0x1ac,	"hbr",		_A2(A_S11I,A_A),	00010,	LS)	/* HBR           BTB[B9]<-M[Ra] */
LS                176 arch/powerpc/xmon/spu-insns.h APUOP(M_STQD,		RI10,	0x120,	"stqd",		_A4(A_T,A_S14,A_P,A_A),	00011,	LS)	/* SToreQDisp    M[Ra+I10]<-RT */
LS                185 arch/powerpc/xmon/spu-insns.h APUOP(M_LQX,		RR,	0x1c4,	"lqx",		_A3(A_T,A_A,A_B),		00112,	LS)	/* LoadQindeX    RT<-M[Ra+Rb] */
LS                195 arch/powerpc/xmon/spu-insns.h APUOP(M_STQX,		RR,	0x144,	"stqx",		_A3(A_T,A_A,A_B),		00111,	LS)	/* SToreQindeX   M[Ra+Rb]<-RT */
LS                378 arch/powerpc/xmon/spu-insns.h APUOPFB(M_HBRP,		LBTI,	0x1ac,	0x40,	"hbrp",		_A0(),	        00010,	LS)	/* HBR           BTB[B9]<-M[Ra] */
LS               1515 drivers/scsi/lpfc/lpfc_bsg.c 	icmd->un.xseq64.w5.hcsw.Fctl = (LS | LA);
LS               3287 drivers/scsi/lpfc/lpfc_bsg.c 	cmd->un.xseq64.w5.hcsw.Fctl = (LS | LA);
LS               3723 drivers/scsi/lpfc/lpfc_hw.h #define LS      0x80		/* Last Sequence */
LS                 77 security/apparmor/include/label.h #define __labelset_for_each(LS, N) \
LS                 78 security/apparmor/include/label.h 	for ((N) = rb_first(&(LS)->root); (N); (N) = rb_next(N))