LL 155 arch/arc/include/asm/perf_event.h [C(LL)] = { LL 187 arch/arm/kernel/perf_event_v7.c [C(LL)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L2_CACHE_ACCESS, LL 188 arch/arm/kernel/perf_event_v7.c [C(LL)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_A8_PERFCTR_L2_CACHE_REFILL, LL 189 arch/arm/kernel/perf_event_v7.c [C(LL)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L2_CACHE_ACCESS, LL 190 arch/arm/kernel/perf_event_v7.c [C(LL)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_A8_PERFCTR_L2_CACHE_REFILL, LL 326 arch/arm/kernel/perf_event_v7.c [C(LL)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_READ, LL 327 arch/arm/kernel/perf_event_v7.c [C(LL)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_A15_PERFCTR_L2_CACHE_REFILL_READ, LL 328 arch/arm/kernel/perf_event_v7.c [C(LL)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_WRITE, LL 329 arch/arm/kernel/perf_event_v7.c [C(LL)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_A15_PERFCTR_L2_CACHE_REFILL_WRITE, LL 375 arch/arm/kernel/perf_event_v7.c [C(LL)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L2_CACHE_ACCESS, LL 376 arch/arm/kernel/perf_event_v7.c [C(LL)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L2_CACHE_REFILL, LL 377 arch/arm/kernel/perf_event_v7.c [C(LL)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L2_CACHE_ACCESS, LL 378 arch/arm/kernel/perf_event_v7.c [C(LL)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_L2_CACHE_REFILL, LL 424 arch/arm/kernel/perf_event_v7.c [C(LL)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_A12_PERFCTR_L2_CACHE_ACCESS_READ, LL 425 arch/arm/kernel/perf_event_v7.c [C(LL)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L2_CACHE_REFILL, LL 426 arch/arm/kernel/perf_event_v7.c [C(LL)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_A12_PERFCTR_L2_CACHE_ACCESS_WRITE, LL 427 arch/arm/kernel/perf_event_v7.c [C(LL)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_L2_CACHE_REFILL, LL 62 arch/arm/nwfpe/ARM-gcc.h #define LIT64( a ) a##LL LL 773 arch/csky/kernel/perf_event.c [C(LL)] = { LL 30 arch/mips/include/asm/addrspace.h #define _CONST64_(x) x ## LL LL 908 arch/mips/kernel/perf_event_mipsxx.c [C(LL)] = { LL 989 arch/mips/kernel/perf_event_mipsxx.c [C(LL)] = { LL 1160 arch/mips/kernel/perf_event_mipsxx.c [C(LL)] = { LL 1242 arch/mips/kernel/perf_event_mipsxx.c [C(LL)] = { LL 610 arch/mips/kernel/traps.c if ((opcode & OPCODE) == LL) { LL 284 arch/nds32/include/asm/pmu.h [C(LL)] = { LL 55 arch/powerpc/perf/e500-pmu.c [C(LL)] = { /* RESULT_ACCESS RESULT_MISS */ LL 53 arch/powerpc/perf/e6500-pmu.c [C(LL)] = { LL 133 arch/powerpc/perf/generic-compat-pmu.c [ C(LL) ] = { LL 368 arch/powerpc/perf/mpc7450-pmu.c [C(LL)] = { /* RESULT_ACCESS RESULT_MISS */ LL 632 arch/powerpc/perf/power5+-pmu.c [C(LL)] = { /* RESULT_ACCESS RESULT_MISS */ LL 574 arch/powerpc/perf/power5-pmu.c [C(LL)] = { /* RESULT_ACCESS RESULT_MISS */ LL 495 arch/powerpc/perf/power6-pmu.c [C(LL)] = { /* RESULT_ACCESS RESULT_MISS */ LL 346 arch/powerpc/perf/power7-pmu.c [C(LL)] = { /* RESULT_ACCESS RESULT_MISS */ LL 285 arch/powerpc/perf/power8-pmu.c [ C(LL) ] = { LL 342 arch/powerpc/perf/power9-pmu.c [ C(LL) ] = { LL 446 arch/powerpc/perf/ppc970-pmu.c [C(LL)] = { /* RESULT_ACCESS RESULT_MISS */ LL 84 arch/riscv/kernel/perf_event.c [C(LL)] = { LL 121 arch/sh/kernel/cpu/sh4/perf_event.c [ C(LL) ] = { LL 42 arch/sh/kernel/cpu/sh4/softfloat.c #define LIT64( a ) a##LL LL 146 arch/sh/kernel/cpu/sh4a/perf_event.c [ C(LL) ] = { LL 249 arch/sparc/kernel/perf_event.c [C(LL)] = { LL 387 arch/sparc/kernel/perf_event.c [C(LL)] = { LL 522 arch/sparc/kernel/perf_event.c [C(LL)] = { LL 659 arch/sparc/kernel/perf_event.c [C(LL)] = { LL 50 arch/x86/events/amd/core.c [ C(LL ) ] = { LL 154 arch/x86/events/amd/core.c [C(LL)] = { LL 453 arch/x86/events/intel/core.c [ C(LL ) ] = { LL 530 arch/x86/events/intel/core.c [ C(LL ) ] = { LL 618 arch/x86/events/intel/core.c [ C(LL ) ] = { LL 681 arch/x86/events/intel/core.c [ C(LL ) ] = { LL 837 arch/x86/events/intel/core.c [ C(LL ) ] = { LL 914 arch/x86/events/intel/core.c [ C(LL ) ] = { LL 989 arch/x86/events/intel/core.c [ C(LL ) ] = { LL 1109 arch/x86/events/intel/core.c [ C(LL ) ] = { LL 1172 arch/x86/events/intel/core.c [ C(LL ) ] = { LL 1287 arch/x86/events/intel/core.c [ C(LL ) ] = { LL 1378 arch/x86/events/intel/core.c [ C(LL ) ] = { LL 1480 arch/x86/events/intel/core.c [ C(LL ) ] = { LL 1529 arch/x86/events/intel/core.c [ C(LL ) ] = { LL 1663 arch/x86/events/intel/core.c [C(LL)] = { LL 1725 arch/x86/events/intel/core.c [C(LL)] = { LL 1779 arch/x86/events/intel/core.c [C(LL)] = { LL 1841 arch/x86/events/intel/core.c [C(LL)] = { LL 1873 arch/x86/events/intel/core.c [C(LL)] = { LL 1920 arch/x86/events/intel/core.c [C(LL)] = { LL 4928 arch/x86/events/intel/core.c hw_cache_extra_regs[C(LL)][C(OP_READ)][C(RESULT_MISS)] = HSW_DEMAND_READ | LL 4930 arch/x86/events/intel/core.c hw_cache_extra_regs[C(LL)][C(OP_WRITE)][C(RESULT_MISS)] = HSW_DEMAND_WRITE|BDW_L3_MISS| LL 59 arch/x86/events/intel/knc.c [ C(LL ) ] = { LL 526 arch/x86/events/intel/p4.c [ C(LL ) ] = { LL 56 arch/x86/events/intel/p6.c [ C(LL ) ] = { LL 406 drivers/edac/mce_amd.c u8 ll = LL(ec); LL 421 drivers/edac/mce_amd.c if (R4(ec) == R4_GEN && LL(ec) == LL_L1) { LL 445 drivers/edac/mce_amd.c if (TT(ec) != TT_DATA || LL(ec) != LL_L1) LL 465 drivers/edac/mce_amd.c if ((II(ec) != II_MEM && II(ec) != II_IO) || LL(ec) != LL_LG) LL 566 drivers/edac/mce_amd.c u8 ll = LL(ec); LL 25 drivers/edac/mce_amd.h #define LL_MSG(x) ll_msgs[LL(x)] LL 540 drivers/net/ethernet/apm/xgene/xgene_enet_main.c raw_desc->m0 = cpu_to_le64(SET_VAL(LL, ll) | SET_VAL(NV, nv) | LL 31 include/asm-generic/int-ll64.h #define S64_C(x) x ## LL LL 253 net/ceph/crush/mapper.c __u64 RH, LH, LL, xl64, result; LL 285 net/ceph/crush/mapper.c LL = __LL_tbl[index2]; LL 287 net/ceph/crush/mapper.c LH = LH + LL; LL 66 sound/usb/usx2y/usbus428ctldefs.h LL, LL 527 tools/perf/util/evsel.c [C(LL)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH),