LCD_SPU_SRAM_PARA1  144 drivers/gpu/drm/armada/armada_crtc.c 			       base + LCD_SPU_SRAM_PARA1);
LCD_SPU_SRAM_PARA1  168 drivers/gpu/drm/armada/armada_crtc.c 			       base + LCD_SPU_SRAM_PARA1);
LCD_SPU_SRAM_PARA1  645 drivers/gpu/drm/armada/armada_crtc.c 	para1 = readl_relaxed(dcrtc->base + LCD_SPU_SRAM_PARA1);
LCD_SPU_SRAM_PARA1  647 drivers/gpu/drm/armada/armada_crtc.c 		       dcrtc->base + LCD_SPU_SRAM_PARA1);
LCD_SPU_SRAM_PARA1  939 drivers/gpu/drm/armada/armada_crtc.c 		       CFG_PDWN64x66, dcrtc->base + LCD_SPU_SRAM_PARA1);
LCD_SPU_SRAM_PARA1   95 drivers/gpu/drm/armada/armada_overlay.c 				     LCD_SPU_SRAM_PARA1);
LCD_SPU_SRAM_PARA1  237 drivers/gpu/drm/armada/armada_overlay.c 			     LCD_SPU_SRAM_PARA1);
LCD_SPU_SRAM_PARA1  186 drivers/gpu/drm/armada/armada_plane.c 		armada_reg_queue_mod(regs, idx, 0, val, LCD_SPU_SRAM_PARA1);
LCD_SPU_SRAM_PARA1  268 drivers/gpu/drm/armada/armada_plane.c 			     0, LCD_SPU_SRAM_PARA1);
LCD_SPU_SRAM_PARA1  725 drivers/video/fbdev/pxa168fb.c 		fbi->reg_base + LCD_SPU_SRAM_PARA1);