LCDC_V1_PL_INT_ENA  119 drivers/gpu/drm/tilcdc/tilcdc_crtc.c 		tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_PL_INT_ENA);
LCDC_V1_PL_INT_ENA  135 drivers/gpu/drm/tilcdc/tilcdc_crtc.c 		tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_PL_INT_ENA);
LCDC_V1_PL_INT_ENA  168 drivers/gpu/drm/tilcdc/tilcdc_crtc.c 			LCDC_V1_UNDERFLOW_INT_ENA | LCDC_V1_PL_INT_ENA);
LCDC_V1_PL_INT_ENA  923 drivers/gpu/drm/tilcdc/tilcdc_crtc.c 				     LCDC_V1_PL_INT_ENA);