LCDC_DMA_FB_BASE_ADDR_0_REG   87 drivers/gpu/drm/tilcdc/tilcdc_crtc.c 	tilcdc_write64(dev, LCDC_DMA_FB_BASE_ADDR_0_REG, dma_base_and_ceiling);
LCDC_DMA_FB_BASE_ADDR_0_REG  106 drivers/gpu/drm/tilcdc/tilcdc_crtc.c 	tilcdc_write(dev, LCDC_DMA_FB_BASE_ADDR_0_REG,
LCDC_DMA_FB_BASE_ADDR_0_REG  436 drivers/gpu/drm/tilcdc/tilcdc_drv.c 		REG(1, true,  LCDC_DMA_FB_BASE_ADDR_0_REG),