LCCR3_HSP         132 arch/arm/mach-pxa/include/mach/regs-lcd.h #define LCCR3_HorSnchH	(LCCR3_HSP*0)	/*  HSP Active High */
LCCR3_HSP         133 arch/arm/mach-pxa/include/mach/regs-lcd.h #define LCCR3_HorSnchL	(LCCR3_HSP*1)	/*  HSP Active Low */
LCCR3_HSP        1788 arch/arm/mach-sa1100/include/mach/SA-1100.h #define LCCR3_HorSnchH	(LCCR3_HSP*0)	/*  Horizontal Synchronization     */
LCCR3_HSP        1790 arch/arm/mach-sa1100/include/mach/SA-1100.h #define LCCR3_HorSnchL	(LCCR3_HSP*1)	/*  Horizontal Synchronization     */
LCCR3_HSP          82 drivers/video/fbdev/pxafb.c #define LCCR3_INVALID_CONFIG_MASK	(LCCR3_HSP | LCCR3_VSP |\
LCCR3_HSP        1254 drivers/video/fbdev/pxafb.c 	fbi->reg_lccr3 |= (var->sync & FB_SYNC_HOR_HIGH_ACT) ? LCCR3_HSP : 0;