LB_VLINE_STATUS  3205 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 	tmp = REG_SET_FIELD(tmp, LB_VLINE_STATUS, VLINE_ACK, 1);
LB_VLINE_STATUS  3331 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 	tmp = REG_SET_FIELD(tmp, LB_VLINE_STATUS, VLINE_ACK, 1);
LB_VLINE_STATUS  7338 drivers/gpu/drm/radeon/cik.c 		WREG32(LB_VLINE_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET, VLINE_ACK);
LB_VLINE_STATUS  7342 drivers/gpu/drm/radeon/cik.c 		WREG32(LB_VLINE_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, VLINE_ACK);
LB_VLINE_STATUS  7354 drivers/gpu/drm/radeon/cik.c 			WREG32(LB_VLINE_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET, VLINE_ACK);
LB_VLINE_STATUS  7358 drivers/gpu/drm/radeon/cik.c 			WREG32(LB_VLINE_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET, VLINE_ACK);
LB_VLINE_STATUS  7371 drivers/gpu/drm/radeon/cik.c 			WREG32(LB_VLINE_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, VLINE_ACK);
LB_VLINE_STATUS  7375 drivers/gpu/drm/radeon/cik.c 			WREG32(LB_VLINE_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET, VLINE_ACK);