LANE_COUNT_ONE 199 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c case LANE_COUNT_ONE: LANE_COUNT_ONE 755 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c if (ln_count >= LANE_COUNT_ONE && !dpcd_lane_status[0].bits.CR_DONE_0) LANE_COUNT_ONE 1635 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c link->verified_link_cap.lane_count = LANE_COUNT_ONE; LANE_COUNT_ONE 1716 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c return lane_count <= LANE_COUNT_ONE; LANE_COUNT_ONE 1730 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c return LANE_COUNT_ONE; LANE_COUNT_ONE 1731 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c case LANE_COUNT_ONE: LANE_COUNT_ONE 1757 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c case LANE_COUNT_ONE: LANE_COUNT_ONE 1815 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c LANE_COUNT_ONE; LANE_COUNT_ONE 1912 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c LANE_COUNT_ONE, LINK_RATE_LOW, LINK_SPREAD_DISABLED, false, 0}; LANE_COUNT_ONE 1961 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c initial_link_setting.lane_count = LANE_COUNT_ONE; LANE_COUNT_ONE 486 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c DP_UDI_LANES, link_settings->lane_count - LANE_COUNT_ONE); LANE_COUNT_ONE 496 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c DP_UDI_LANES, link_settings->lane_count - LANE_COUNT_ONE);