KSEG1ADDR 85 arch/mips/alchemy/board-xxs1500.c __raw_writel(1, (void __iomem *)KSEG1ADDR(AU1000_UART3_PHYS_ADDR + 0x18)); KSEG1ADDR 109 arch/mips/alchemy/common/clock.c #define IOMEM(x) ((void __iomem *)(KSEG1ADDR(CPHYSADDR(x)))) KSEG1ADDR 60 arch/mips/alchemy/common/dbdma.c (dbdma_global_t *)KSEG1ADDR(AU1550_DBDMA_CONF_PHYS_ADDR); KSEG1ADDR 321 arch/mips/alchemy/common/dbdma.c dcp = KSEG1ADDR(AU1550_DBDMA_PHYS_ADDR); KSEG1ADDR 987 arch/mips/alchemy/common/dbdma.c addr = (void __iomem *)KSEG1ADDR(AU1550_DBDMA_CONF_PHYS_ADDR); KSEG1ADDR 994 arch/mips/alchemy/common/dbdma.c addr = (void __iomem *)KSEG1ADDR(AU1550_DBDMA_PHYS_ADDR); KSEG1ADDR 1012 arch/mips/alchemy/common/dbdma.c addr = (void __iomem *)KSEG1ADDR(AU1550_DBDMA_CONF_PHYS_ADDR); KSEG1ADDR 1024 arch/mips/alchemy/common/dbdma.c addr = (void __iomem *)KSEG1ADDR(AU1550_DBDMA_CONF_PHYS_ADDR); KSEG1ADDR 1031 arch/mips/alchemy/common/dbdma.c addr = (void __iomem *)KSEG1ADDR(AU1550_DBDMA_PHYS_ADDR); KSEG1ADDR 207 arch/mips/alchemy/common/dma.c chan->io = (void __iomem *)(KSEG1ADDR(AU1000_DMA_PHYS_ADDR) + KSEG1ADDR 291 arch/mips/alchemy/common/irq.c void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR); KSEG1ADDR 301 arch/mips/alchemy/common/irq.c void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR); KSEG1ADDR 311 arch/mips/alchemy/common/irq.c void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR); KSEG1ADDR 321 arch/mips/alchemy/common/irq.c void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR); KSEG1ADDR 331 arch/mips/alchemy/common/irq.c void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR); KSEG1ADDR 345 arch/mips/alchemy/common/irq.c void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR); KSEG1ADDR 359 arch/mips/alchemy/common/irq.c void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR); KSEG1ADDR 371 arch/mips/alchemy/common/irq.c void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR); KSEG1ADDR 438 arch/mips/alchemy/common/irq.c base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR); KSEG1ADDR 442 arch/mips/alchemy/common/irq.c base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR); KSEG1ADDR 763 arch/mips/alchemy/common/irq.c alchemy_ic_suspend_one((void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR), KSEG1ADDR 765 arch/mips/alchemy/common/irq.c alchemy_ic_suspend_one((void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR), KSEG1ADDR 772 arch/mips/alchemy/common/irq.c alchemy_ic_resume_one((void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR), KSEG1ADDR 774 arch/mips/alchemy/common/irq.c alchemy_ic_resume_one((void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR), KSEG1ADDR 780 arch/mips/alchemy/common/irq.c void __iomem *base = (void __iomem *)KSEG1ADDR(AU1300_GPIC_PHYS_ADDR); KSEG1ADDR 811 arch/mips/alchemy/common/irq.c void __iomem *base = (void __iomem *)KSEG1ADDR(AU1300_GPIC_PHYS_ADDR); KSEG1ADDR 828 arch/mips/alchemy/common/irq.c base = (void __iomem *)KSEG1ADDR(AU1300_GPIC_PHYS_ADDR); KSEG1ADDR 856 arch/mips/alchemy/common/irq.c unsigned long r = __raw_readl((void __iomem *)KSEG1ADDR(addr)); \ KSEG1ADDR 881 arch/mips/alchemy/common/irq.c ic_init((void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR)); KSEG1ADDR 882 arch/mips/alchemy/common/irq.c ic_init((void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR)); KSEG1ADDR 905 arch/mips/alchemy/common/irq.c base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR); KSEG1ADDR 908 arch/mips/alchemy/common/irq.c base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR); KSEG1ADDR 268 arch/mips/alchemy/common/usb.c (void __iomem *)KSEG1ADDR(AU1300_USB_CTL_PHYS_ADDR); KSEG1ADDR 296 arch/mips/alchemy/common/usb.c (void __iomem *)KSEG1ADDR(AU1300_USB_CTL_PHYS_ADDR); KSEG1ADDR 363 arch/mips/alchemy/common/usb.c (void __iomem *)KSEG1ADDR(AU1200_USB_CTL_PHYS_ADDR); KSEG1ADDR 386 arch/mips/alchemy/common/usb.c (void __iomem *)KSEG1ADDR(AU1200_USB_CTL_PHYS_ADDR); KSEG1ADDR 394 arch/mips/alchemy/common/usb.c void __iomem *base = (void __iomem *)KSEG1ADDR(rb + reg); KSEG1ADDR 427 arch/mips/alchemy/common/usb.c void __iomem *base = (void __iomem *)KSEG1ADDR(rb); KSEG1ADDR 514 arch/mips/alchemy/common/usb.c void __iomem *base = (void __iomem *)KSEG1ADDR(br); KSEG1ADDR 532 arch/mips/alchemy/common/usb.c (void __iomem *)KSEG1ADDR(AU1200_USB_OTG_PHYS_ADDR); KSEG1ADDR 552 arch/mips/alchemy/common/usb.c (void __iomem *)KSEG1ADDR(AU1300_USB_CTL_PHYS_ADDR); KSEG1ADDR 18 arch/mips/alchemy/common/vss.c #define VSS_ADDR(blk) (KSEG1ADDR(AU1300_VSS_PHYS_ADDR) + (blk * 0x0c)) KSEG1ADDR 33 arch/mips/alchemy/devboards/bcsr.c bcsr1_phys = KSEG1ADDR(CPHYSADDR(bcsr1_phys)); KSEG1ADDR 34 arch/mips/alchemy/devboards/bcsr.c bcsr2_phys = KSEG1ADDR(CPHYSADDR(bcsr2_phys)); KSEG1ADDR 918 arch/mips/alchemy/devboards/db1200.c (void __iomem *)KSEG1ADDR(AU1550_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET); KSEG1ADDR 823 arch/mips/alchemy/devboards/db1300.c (void __iomem *)KSEG1ADDR(AU1300_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET); KSEG1ADDR 826 arch/mips/alchemy/devboards/db1300.c (void __iomem *)KSEG1ADDR(AU1300_PSC2_PHYS_ADDR) + PSC_SEL_OFFSET); KSEG1ADDR 836 arch/mips/alchemy/devboards/db1300.c (void __iomem *)KSEG1ADDR(AU1300_PSC3_PHYS_ADDR) + PSC_SEL_OFFSET); KSEG1ADDR 47 arch/mips/alchemy/devboards/db1550.c base = (void __iomem *)KSEG1ADDR(AU1550_PSC1_PHYS_ADDR); KSEG1ADDR 608 arch/mips/alchemy/devboards/db1550.c (void __iomem *)KSEG1ADDR(AU1550_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET); KSEG1ADDR 611 arch/mips/alchemy/devboards/db1550.c (void __iomem *)KSEG1ADDR(AU1550_PSC3_PHYS_ADDR) + PSC_SEL_OFFSET); KSEG1ADDR 615 arch/mips/alchemy/devboards/db1550.c (void __iomem *)KSEG1ADDR(AU1550_PSC0_PHYS_ADDR) + PSC_SEL_OFFSET); KSEG1ADDR 618 arch/mips/alchemy/devboards/db1550.c (void __iomem *)KSEG1ADDR(AU1550_PSC2_PHYS_ADDR) + PSC_SEL_OFFSET); KSEG1ADDR 147 arch/mips/ar7/clock.c didr1 = readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x18)); KSEG1ADDR 148 arch/mips/ar7/clock.c didr2 = readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x1c)); KSEG1ADDR 263 arch/mips/ar7/gpio.c void __iomem *pin_sel = (void __iomem *)KSEG1ADDR(AR7_REGS_PINSEL); KSEG1ADDR 33 arch/mips/ar7/irq.c #define REG(addr) ((u32 *)(KSEG1ADDR(AR7_REGS_IRQ) + addr)) KSEG1ADDR 23 arch/mips/ar7/memory.c u32 *addr = (u32 *)KSEG1ADDR(AR7_SDRAM_BASE + size - 4); KSEG1ADDR 24 arch/mips/ar7/memory.c u32 *kernel_end = (u32 *)KSEG1ADDR(CPHYSADDR((u32)&_end)); KSEG1ADDR 175 arch/mips/ar7/prom.c struct psbl_rec *psbl = (struct psbl_rec *)(KSEG1ADDR(0x14000300)); KSEG1ADDR 176 arch/mips/ar7/prom.c void *psp_env = (void *)KSEG1ADDR(psbl->env_base); KSEG1ADDR 240 arch/mips/ar7/prom.c #define PORT(offset) (KSEG1ADDR(AR7_REGS_UART0 + (offset * 4))) KSEG1ADDR 35 arch/mips/ath25/early_printk.c base = (void __iomem *)(KSEG1ADDR(AR2315_UART0_BASE)); KSEG1ADDR 37 arch/mips/ath25/early_printk.c base = (void __iomem *)(KSEG1ADDR(AR5312_UART0_BASE)); KSEG1ADDR 36 arch/mips/ath79/early_printk.c void __iomem *base = (void __iomem *)(KSEG1ADDR(AR71XX_UART_BASE)); KSEG1ADDR 45 arch/mips/ath79/early_printk.c void __iomem *base = (void __iomem *)(KSEG1ADDR(AR933X_UART_BASE)); KSEG1ADDR 94 arch/mips/ath79/early_printk.c gpio_base = (void __iomem *)KSEG1ADDR(AR71XX_GPIO_BASE); KSEG1ADDR 105 arch/mips/ath79/early_printk.c base = (void __iomem *)(KSEG1ADDR(AR71XX_RESET_BASE)); KSEG1ADDR 762 arch/mips/bcm63xx/boards/board_bcm963xx.c boot_addr = (u8 *)KSEG1ADDR(val); KSEG1ADDR 96 arch/mips/emma/markeins/platform.c .membase= (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR0_BASE + 3), KSEG1ADDR 104 arch/mips/emma/markeins/platform.c .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR1_BASE + 3), KSEG1ADDR 112 arch/mips/emma/markeins/platform.c .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR2_BASE + 3), KSEG1ADDR 89 arch/mips/emma/markeins/setup.c set_io_port_base(KSEG1ADDR(EMMA2RH_PCI_IO_BASE)); KSEG1ADDR 5 arch/mips/include/asm/lasat/ds1603.h #define DS1603_REG_100 (KSEG1ADDR(0x1c810000)) KSEG1ADDR 12 arch/mips/include/asm/lasat/ds1603.h #define DS1603_REG_200 (KSEG1ADDR(0x11000000)) KSEG1ADDR 5 arch/mips/include/asm/lasat/eeprom.h #define AT93C_REG_100 KSEG1ADDR(0x1c810000) KSEG1ADDR 13 arch/mips/include/asm/lasat/eeprom.h #define AT93C_REG_200 KSEG1ADDR(0x11000000) KSEG1ADDR 238 arch/mips/include/asm/lasat/lasat.h #define LASAT_GT_BASE (KSEG1ADDR(0x14000000)) KSEG1ADDR 242 arch/mips/include/asm/lasat/lasat.h #define Vrc5074_BASE (KSEG1ADDR(Vrc5074_PHYS_BASE)) KSEG1ADDR 6 arch/mips/include/asm/lasat/lasatint.h #define LASAT_INT_STATUS_REG_100 (KSEG1ADDR(0x1c880000)) KSEG1ADDR 7 arch/mips/include/asm/lasat/lasatint.h #define LASAT_INT_MASK_REG_100 (KSEG1ADDR(0x1c890000)) KSEG1ADDR 11 arch/mips/include/asm/lasat/lasatint.h #define LASAT_INT_STATUS_REG_200 (KSEG1ADDR(0x1104003c)) KSEG1ADDR 12 arch/mips/include/asm/lasat/lasatint.h #define LASAT_INT_MASK_REG_200 (KSEG1ADDR(0x1104003c)) KSEG1ADDR 3 arch/mips/include/asm/lasat/picvue.h #define PVC_REG_100 KSEG1ADDR(0x1c820000) KSEG1ADDR 11 arch/mips/include/asm/lasat/picvue.h #define PVC_REG_200 KSEG1ADDR(0x11000000) KSEG1ADDR 111 arch/mips/include/asm/mach-ar7/ar7.h return (readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x24)) & 0xffff) == KSEG1ADDR 118 arch/mips/include/asm/mach-ar7/ar7.h KSEG1ADDR(AR7_REGS_GPIO + 0x14)) & 0xffff); KSEG1ADDR 123 arch/mips/include/asm/mach-ar7/ar7.h unsigned int val = readl((void *)KSEG1ADDR(AR7_REGS_GPIO + KSEG1ADDR 130 arch/mips/include/asm/mach-ar7/ar7.h return (readl((void *)KSEG1ADDR(AR7_REGS_GPIO + (ar7_is_titan() ? 0x24 : KSEG1ADDR 157 arch/mips/include/asm/mach-ar7/ar7.h (void *)KSEG1ADDR(AR7_REGS_RESET + AR7_RESET_PERIPHERAL); KSEG1ADDR 165 arch/mips/include/asm/mach-ar7/ar7.h (void *)KSEG1ADDR(AR7_REGS_RESET + AR7_RESET_PERIPHERAL); KSEG1ADDR 178 arch/mips/include/asm/mach-ar7/ar7.h void *power_reg = (void *)KSEG1ADDR(AR7_REGS_POWER); KSEG1ADDR 185 arch/mips/include/asm/mach-ar7/ar7.h void *power_reg = (void *)KSEG1ADDR(AR7_REGS_POWER); KSEG1ADDR 603 arch/mips/include/asm/mach-au1x00/au1000.h void __iomem *b = (void __iomem *)KSEG1ADDR(AU1000_SYS_PHYS_ADDR); KSEG1ADDR 610 arch/mips/include/asm/mach-au1x00/au1000.h void __iomem *b = (void __iomem *)KSEG1ADDR(AU1000_SYS_PHYS_ADDR); KSEG1ADDR 619 arch/mips/include/asm/mach-au1x00/au1000.h void __iomem *b = (void __iomem *)KSEG1ADDR(AU1000_STATIC_MEM_PHYS_ADDR); KSEG1ADDR 626 arch/mips/include/asm/mach-au1x00/au1000.h void __iomem *b = (void __iomem *)KSEG1ADDR(AU1000_STATIC_MEM_PHYS_ADDR); KSEG1ADDR 726 arch/mips/include/asm/mach-au1x00/au1000.h void __iomem *addr = (void __iomem *)KSEG1ADDR(uart_phys); KSEG1ADDR 741 arch/mips/include/asm/mach-au1x00/au1000.h void __iomem *addr = (void __iomem *)KSEG1ADDR(uart_phys); KSEG1ADDR 749 arch/mips/include/asm/mach-au1x00/au1000.h void __iomem *base = (void __iomem *)KSEG1ADDR(uart_phys); KSEG1ADDR 275 arch/mips/include/asm/mach-au1x00/gpio-au1000.h void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_SYS_PHYS_ADDR); KSEG1ADDR 286 arch/mips/include/asm/mach-au1x00/gpio-au1000.h void __iomem *base = (void __iomem *)KSEG1ADDR(AU1500_GPIO2_PHYS_ADDR); KSEG1ADDR 300 arch/mips/include/asm/mach-au1x00/gpio-au1000.h void __iomem *base = (void __iomem *)KSEG1ADDR(AU1500_GPIO2_PHYS_ADDR); KSEG1ADDR 309 arch/mips/include/asm/mach-au1x00/gpio-au1000.h void __iomem *base = (void __iomem *)KSEG1ADDR(AU1500_GPIO2_PHYS_ADDR); KSEG1ADDR 361 arch/mips/include/asm/mach-au1x00/gpio-au1000.h void __iomem *base = (void __iomem *)KSEG1ADDR(AU1500_GPIO2_PHYS_ADDR); KSEG1ADDR 443 arch/mips/include/asm/mach-au1x00/gpio-au1000.h void __iomem *base = (void __iomem *)KSEG1ADDR(AU1500_GPIO2_PHYS_ADDR); KSEG1ADDR 457 arch/mips/include/asm/mach-au1x00/gpio-au1000.h void __iomem *base = (void __iomem *)KSEG1ADDR(AU1500_GPIO2_PHYS_ADDR); KSEG1ADDR 27 arch/mips/include/asm/mach-au1x00/gpio-au1300.h (void __iomem *)KSEG1ADDR(AU1300_GPIC_PHYS_ADDR) KSEG1ADDR 26 arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h #define LTQ_EARLY_ASC KSEG1ADDR(LTQ_ASC0_BASE_ADDR) KSEG1ADDR 79 arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h #define LTQ_EARLY_ASC KSEG1ADDR(LTQ_ASC1_BASE_ADDR) KSEG1ADDR 15 arch/mips/include/asm/mach-lasat/mach-gt64120.h #define GT64120_BASE (KSEG1ADDR(0x14000000)) KSEG1ADDR 12 arch/mips/include/asm/mach-loongson32/regs-clk.h ((void __iomem *)KSEG1ADDR(LS1X_CLK_BASE + (x))) KSEG1ADDR 12 arch/mips/include/asm/mach-loongson32/regs-mux.h ((void __iomem *)KSEG1ADDR(LS1X_MUX_BASE + (x))) KSEG1ADDR 114 arch/mips/include/asm/mach-loongson32/regs-mux.h ((void __iomem *)KSEG1ADDR(LS1X_CBUS_BASE + (n * 0x04) + (x))) KSEG1ADDR 12 arch/mips/include/asm/mach-loongson32/regs-rtc.h ((void __iomem *)KSEG1ADDR(LS1X_RTC_BASE + (x))) KSEG1ADDR 147 arch/mips/include/asm/mach-pmcs-msp71xx/msp_regs.h #define regptr(addr) (KSEG1ADDR(addr)) KSEG1ADDR 149 arch/mips/include/asm/mach-pmcs-msp71xx/msp_regs.h #define regptr(addr) ((volatile u32 *const)(KSEG1ADDR(addr))) KSEG1ADDR 13 arch/mips/include/asm/mach-rc32434/rb.h #define IDT434_REG_BASE ((volatile void *) KSEG1ADDR(REGBASE)) KSEG1ADDR 97 arch/mips/include/asm/netlogic/xlr/iomap.h #define NETLOGIC_CPLD_OFFSET KSEG1ADDR(0x1d840000) KSEG1ADDR 54 arch/mips/lantiq/prom.c char **argv = (char **) KSEG1ADDR(fw_arg1); KSEG1ADDR 60 arch/mips/lantiq/prom.c char *p = (char *) KSEG1ADDR(argv[i]); KSEG1ADDR 37 arch/mips/lasat/serial.c lasat_serial_res[0].start = KSEG1ADDR(LASAT_UART_REGS_BASE_100); KSEG1ADDR 49 arch/mips/lasat/serial.c lasat_serial_res[0].start = KSEG1ADDR(LASAT_UART_REGS_BASE_200); KSEG1ADDR 47 arch/mips/lasat/setup.c .reset_reg = (void *)KSEG1ADDR(0x1c840000), KSEG1ADDR 48 arch/mips/lasat/setup.c .flash_wp_reg = (void *)KSEG1ADDR(0x1c800000), 2 KSEG1ADDR 50 arch/mips/lasat/setup.c .reset_reg = (void *)KSEG1ADDR(0x11080000), KSEG1ADDR 51 arch/mips/lasat/setup.c .flash_wp_reg = (void *)KSEG1ADDR(0x11000000), 6 KSEG1ADDR 14 arch/mips/loongson32/common/irq.c ((void __iomem *)KSEG1ADDR(LS1X_INTC_BASE + (n * 0x18) + (x))) KSEG1ADDR 46 arch/mips/paravirt/setup.c set_io_port_base(KSEG1ADDR(0x1e000000)); KSEG1ADDR 73 arch/mips/pci/ops-emma2rh.c u32 base = KSEG1ADDR(EMMA2RH_PCI_CONFIG_BASE); KSEG1ADDR 118 arch/mips/pci/ops-emma2rh.c u32 base = KSEG1ADDR(EMMA2RH_PCI_CONFIG_BASE); KSEG1ADDR 51 arch/mips/pci/ops-nile4.c KSEG1ADDR(PCI_WINDOW1) + KSEG1ADDR 55 arch/mips/pci/ops-nile4.c adr = KSEG1ADDR(PCI_WINDOW1) | (busnum << 16) | (devfn << 8) | KSEG1ADDR 19 arch/mips/pci/ops-vr41xx.c #define PCICONFDREG (void __iomem *)KSEG1ADDR(0x0f000c14) KSEG1ADDR 20 arch/mips/pci/ops-vr41xx.c #define PCICONFAREG (void __iomem *)KSEG1ADDR(0x0f000c18) KSEG1ADDR 131 arch/mips/pci/pci-vr41xx.h #define IO_PORT_BASE KSEG1ADDR(PCI_MASTER_IO_BUS_BASE_ADDRESS) KSEG1ADDR 13 arch/mips/ralink/bootrom.c static void __iomem *membase = (void __iomem *) KSEG1ADDR(BOOTROM_OFFSET); KSEG1ADDR 31 arch/mips/ralink/early_printk.c static __iomem void *uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE); KSEG1ADDR 32 arch/mips/ralink/early_printk.c static __iomem void *chipid_membase = (__iomem void *) KSEG1ADDR(CHIPID_BASE); KSEG1ADDR 64 arch/mips/ralink/early_printk.c uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE + KSEG1ADDR 644 arch/mips/ralink/mt7620.c void __iomem *sysc = (void __iomem *) KSEG1ADDR(MT7620_SYSC_BASE); KSEG1ADDR 165 arch/mips/ralink/mt7621.c void __iomem *sysc = (void __iomem *) KSEG1ADDR(MT7621_SYSC_BASE); KSEG1ADDR 42 arch/mips/ralink/prom.c argv = (char **) KSEG1ADDR(fw_arg1); KSEG1ADDR 51 arch/mips/ralink/prom.c char *p = (char *) KSEG1ADDR(argv[i]); KSEG1ADDR 82 arch/mips/ralink/rt288x.c void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT2880_SYSC_BASE); KSEG1ADDR 98 arch/mips/ralink/rt305x.c void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT305X_SYSC_BASE); KSEG1ADDR 219 arch/mips/ralink/rt305x.c void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT305X_SYSC_BASE); KSEG1ADDR 118 arch/mips/ralink/rt3883.c void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT3883_SYSC_BASE); KSEG1ADDR 222 arch/mips/rb532/devices.c .membase = (char *)KSEG1ADDR(REGBASE + UART0BASE), KSEG1ADDR 62 arch/mips/rb532/irq.c .base_addr = (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 0 * IC_GROUP_OFFSET)}, KSEG1ADDR 65 arch/mips/rb532/irq.c .base_addr = (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 1 * IC_GROUP_OFFSET)}, KSEG1ADDR 68 arch/mips/rb532/irq.c .base_addr = (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 2 * IC_GROUP_OFFSET)}, KSEG1ADDR 71 arch/mips/rb532/irq.c .base_addr = (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 3 * IC_GROUP_OFFSET)}, KSEG1ADDR 74 arch/mips/rb532/irq.c .base_addr = (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 4 * IC_GROUP_OFFSET)} KSEG1ADDR 44 arch/mips/rb532/serial.c .membase = (char *)KSEG1ADDR(REGBASE + UART0BASE), KSEG1ADDR 33 arch/mips/rb532/setup.c ((void (*)(void)) KSEG1ADDR(0x1FC00000u))(); KSEG1ADDR 16 arch/mips/vr41xx/casio-e55/setup.c #define E55_IO_PORT_BASE KSEG1ADDR(E55_ISA_IO_BASE) KSEG1ADDR 27 arch/mips/vr41xx/common/bcu.c #define CLKSPEEDREG_TYPE1 (void __iomem *)KSEG1ADDR(0x0b000014) KSEG1ADDR 28 arch/mips/vr41xx/common/bcu.c #define CLKSPEEDREG_TYPE2 (void __iomem *)KSEG1ADDR(0x0f000014) KSEG1ADDR 139 arch/mips/vr41xx/common/siu.c port.membase = (unsigned char __iomem *)KSEG1ADDR(res[i].start); KSEG1ADDR 16 arch/mips/vr41xx/ibm-workpad/setup.c #define WORKPAD_IO_PORT_BASE KSEG1ADDR(WORKPAD_ISA_IO_BASE) KSEG1ADDR 358 drivers/mtd/nand/raw/au1550nd.c (void __iomem *)KSEG1ADDR(AU1000_STATIC_MEM_PHYS_ADDR); KSEG1ADDR 1079 drivers/net/ethernet/korina.c lp->td_ring = (struct dma_desc *)KSEG1ADDR(lp->td_ring); KSEG1ADDR 117 drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.h while (!(len = *(u16 *) KSEG1ADDR(head->data))) KSEG1ADDR 20 drivers/rtc/rtc-ls1x.c ((void __iomem *)KSEG1ADDR(LS1X_RTC_REG_OFFSET + (x))) KSEG1ADDR 445 drivers/video/fbdev/au1100fb.c fbdev->regs = (struct au1100fb_regs*)KSEG1ADDR(au1100fb_fix.mmio_start); KSEG1ADDR 16 include/video/maxinefb.h #define MAXINEFB_IMS332_ADDRESS KSEG1ADDR(0x1c140000) KSEG1ADDR 22 include/video/maxinefb.h #define DS5000_xx_ONBOARD_FBMEM_START KSEG1ADDR(0x0a000000)