KSEG1             220 arch/mips/ath79/setup.c 	set_io_port_base(KSEG1);
KSEG1              81 arch/mips/include/asm/addrspace.h #define CKSEG1ADDR(a)		(CPHYSADDR(a) | KSEG1)
KSEG1              89 arch/mips/include/asm/addrspace.h #define KSEG1ADDR(a)		(CPHYSADDR(a) | KSEG1)
KSEG1              34 arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h #define FALCON_CHIPID		((u32 *)(KSEG1 + LTQ_STATUS_BASE_ADDR + 0x0c))
KSEG1              35 arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h #define FALCON_CHIPTYPE		((u32 *)(KSEG1 + LTQ_STATUS_BASE_ADDR + 0x38))
KSEG1              36 arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h #define FALCON_CHIPCONF		((u32 *)(KSEG1 + LTQ_STATUS_BASE_ADDR + 0x40))
KSEG1              94 arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h #define LTQ_MPS_BASE_ADDR	(KSEG1 + 0x1F107000)
KSEG1              33 arch/mips/include/asm/txx9/jmr3927.h #define JMR3927_PORT_BASE	KSEG1
KSEG1              36 arch/mips/include/asm/txx9/jmr3927.h #define JMR3927_ROM0_BASE	(KSEG1 + JMR3927_ROMCE0)
KSEG1              37 arch/mips/include/asm/txx9/jmr3927.h #define JMR3927_ROM1_BASE	(KSEG1 + JMR3927_ROMCE1)
KSEG1              38 arch/mips/include/asm/txx9/jmr3927.h #define JMR3927_IOC_BASE	(KSEG1 + JMR3927_ROMCE2)
KSEG1              39 arch/mips/include/asm/txx9/jmr3927.h #define JMR3927_PCIMEM_BASE	(KSEG1 + JMR3927_PCIMEM)
KSEG1              40 arch/mips/include/asm/txx9/jmr3927.h #define JMR3927_PCIIO_BASE	(KSEG1 + JMR3927_PCIIO)
KSEG1              34 arch/mips/lantiq/falcon/prom.c #define BOOT_REG_BASE	(KSEG1 | 0x1F200000)
KSEG1              25 arch/mips/lantiq/falcon/reset.c #define BOOT_REG_BASE	(KSEG1 | 0x1F200000)
KSEG1              31 arch/mips/lantiq/falcon/reset.c #define WDT_REG_BASE	(KSEG1 | 0x1F8803F0)
KSEG1              78 arch/mips/lantiq/prom.c 	set_io_port_base((unsigned long) KSEG1);
KSEG1             110 arch/mips/lasat/prom.c 	set_io_port_base(KSEG1);
KSEG1              41 arch/mips/pnx833x/common/setup.c 	set_io_port_base(KSEG1);
KSEG1              69 arch/mips/ralink/of.c 	set_io_port_base(KSEG1);
KSEG1              50 arch/mips/rb532/setup.c 	set_io_port_base(KSEG1);
KSEG1             224 arch/mips/txx9/rbtx4927/setup.c 	set_io_port_base(KSEG1 + RBTX4927_ISA_IO_OFFSET);