ARC_REG_TLBPD0     57 arch/arc/include/asm/tlb-mmu1.h ; lr  r1,[ARC_REG_TLBPD0]     /* Data VPN+ASID - already in r1 from TLB_RELOAD*/
ARC_REG_TLBPD0     61 arch/arc/include/asm/tlb-mmu1.h lr      r1,[ARC_REG_TLBPD0]     /* save TLBPD0 containing data TLB*/
ARC_REG_TLBPD0     62 arch/arc/include/asm/tlb-mmu1.h sr      r0,[ARC_REG_TLBPD0]     /* write instruction address to TLBPD0 */
ARC_REG_TLBPD0     65 arch/arc/include/asm/tlb-mmu1.h sr      r1,[ARC_REG_TLBPD0]     /* restore TLBPD0 */
ARC_REG_TLBPD0     85 arch/arc/include/asm/tlb-mmu1.h sr      r0,[ARC_REG_TLBPD0]     /* write instruction address to TLBPD0 */
ARC_REG_TLBPD0     88 arch/arc/include/asm/tlb-mmu1.h sr      r3,[ARC_REG_TLBPD0]     /* restore TLBPD0 */
ARC_REG_TLBPD0    117 arch/arc/mm/tlb.c 	write_aux_reg(ARC_REG_TLBPD0, 0);
ARC_REG_TLBPD0    127 arch/arc/mm/tlb.c 	write_aux_reg(ARC_REG_TLBPD0, vaddr_n_asid);
ARC_REG_TLBPD0    229 arch/arc/mm/tlb.c 	write_aux_reg(ARC_REG_TLBPD0, vaddr_n_asid | _PAGE_PRESENT);
ARC_REG_TLBPD0    235 arch/arc/mm/tlb.c 	write_aux_reg(ARC_REG_TLBPD0, pd0);
ARC_REG_TLBPD0    265 arch/arc/mm/tlb.c 	write_aux_reg(ARC_REG_TLBPD0, 0);
ARC_REG_TLBPD0    277 arch/arc/mm/tlb.c 		write_aux_reg(ARC_REG_TLBPD0, _PAGE_HW_SZ);
ARC_REG_TLBPD0    930 arch/arc/mm/tlb.c 			pd0[way] = read_aux_reg(ARC_REG_TLBPD0);