JZ_REG_TIMER_STOP_SET   57 arch/mips/include/asm/mach-jz4740/timer.h 	writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_SET);
JZ_REG_TIMER_STOP_SET   26 arch/mips/jz4740/timer.c 	writel(BIT(16), jz4740_timer_base + JZ_REG_TIMER_STOP_SET);
JZ_REG_TIMER_STOP_SET   38 arch/mips/jz4740/timer.c 	writel(0x000100fc, jz4740_timer_base + JZ_REG_TIMER_STOP_SET);