Index_Writeback_Inv_D   59 arch/mips/include/asm/r4kcache.h 	cache_op(Index_Writeback_Inv_D, addr);
Index_Writeback_Inv_D  571 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16, )
Index_Writeback_Inv_D  574 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32, )
Index_Writeback_Inv_D  578 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64, )
Index_Writeback_Inv_D  581 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 128, )
Index_Writeback_Inv_D  585 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16, )
Index_Writeback_Inv_D  586 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32, )
Index_Writeback_Inv_D  604 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_USER_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D,
Index_Writeback_Inv_D  607 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_USER_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D,
Index_Writeback_Inv_D  610 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_USER_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D,
Index_Writeback_Inv_D  473 arch/mips/kernel/pm-cps.c 			      Index_Writeback_Inv_D, lbl_flushdcache);
Index_Writeback_Inv_D 1105 arch/mips/kvm/vz.c 	case Index_Writeback_Inv_D:
Index_Writeback_Inv_D  161 arch/mips/txx9/generic/setup.c 		cache_op(Index_Writeback_Inv_D, addr | 0);
Index_Writeback_Inv_D  162 arch/mips/txx9/generic/setup.c 		cache_op(Index_Writeback_Inv_D, addr | 1);
Index_Writeback_Inv_D  163 arch/mips/txx9/generic/setup.c 		cache_op(Index_Writeback_Inv_D, addr | 2);
Index_Writeback_Inv_D  164 arch/mips/txx9/generic/setup.c 		cache_op(Index_Writeback_Inv_D, addr | 3);
Index_Writeback_Inv_D  210 arch/mips/txx9/generic/setup.c 		cache_op(Index_Writeback_Inv_D, addr | 0);
Index_Writeback_Inv_D  211 arch/mips/txx9/generic/setup.c 		cache_op(Index_Writeback_Inv_D, addr | 1);