IS_FPGA_MAXIMUS_DC 113 drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c if (!IS_FPGA_MAXIMUS_DC(core_dc->ctx->dce_environment)) { IS_FPGA_MAXIMUS_DC 155 drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c if (!IS_FPGA_MAXIMUS_DC(core_dc->ctx->dce_environment)) { IS_FPGA_MAXIMUS_DC 103 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c if (!IS_FPGA_MAXIMUS_DC(core_dc->ctx->dce_environment)) { IS_FPGA_MAXIMUS_DC 449 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) { IS_FPGA_MAXIMUS_DC 541 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) { IS_FPGA_MAXIMUS_DC 98 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c if (!IS_FPGA_MAXIMUS_DC(core_dc->ctx->dce_environment)) { IS_FPGA_MAXIMUS_DC 2719 drivers/gpu/drm/amd/display/dc/core/dc_link.c if (!IS_FPGA_MAXIMUS_DC(core_dc->ctx->dce_environment)) { IS_FPGA_MAXIMUS_DC 3464 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c IS_FPGA_MAXIMUS_DC(link->ctx->dce_environment)) IS_FPGA_MAXIMUS_DC 3500 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c IS_FPGA_MAXIMUS_DC(link->ctx->dce_environment)) IS_FPGA_MAXIMUS_DC 372 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c if (IS_FPGA_MAXIMUS_DC(core_dc->ctx->dce_environment)) IS_FPGA_MAXIMUS_DC 421 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c if (dc_is_dp_signal(stream->signal) && !IS_FPGA_MAXIMUS_DC(core_dc->ctx->dce_environment)) { IS_FPGA_MAXIMUS_DC 446 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c if (dc_is_dp_signal(stream->signal) && !IS_FPGA_MAXIMUS_DC(core_dc->ctx->dce_environment)) { IS_FPGA_MAXIMUS_DC 508 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c if (dc_is_dp_signal(stream->signal) && !IS_FPGA_MAXIMUS_DC(core_dc->ctx->dce_environment)) { IS_FPGA_MAXIMUS_DC 517 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c if (dc_is_dp_signal(stream->signal) && !IS_FPGA_MAXIMUS_DC(core_dc->ctx->dce_environment)) { IS_FPGA_MAXIMUS_DC 319 drivers/gpu/drm/amd/display/dc/dc_helper.c !IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) IS_FPGA_MAXIMUS_DC 331 drivers/gpu/drm/amd/display/dc/dc_helper.c if (!IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) IS_FPGA_MAXIMUS_DC 62 drivers/gpu/drm/amd/display/dc/dc_types.h (IS_FPGA_MAXIMUS_DC(dce_environment) || (dce_environment == DCE_ENV_DIAG)) IS_FPGA_MAXIMUS_DC 329 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c if (!IS_FPGA_MAXIMUS_DC(core_dc->ctx->dce_environment)) { IS_FPGA_MAXIMUS_DC 909 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c if (IS_FPGA_MAXIMUS_DC(clock_source->ctx->dce_environment)) { IS_FPGA_MAXIMUS_DC 203 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) IS_FPGA_MAXIMUS_DC 123 drivers/gpu/drm/amd/display/dc/dce112/dce112_hw_sequencer.c if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) IS_FPGA_MAXIMUS_DC 162 drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) IS_FPGA_MAXIMUS_DC 828 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { IS_FPGA_MAXIMUS_DC 1191 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { IS_FPGA_MAXIMUS_DC 1220 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { IS_FPGA_MAXIMUS_DC 2694 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { IS_FPGA_MAXIMUS_DC 2726 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { IS_FPGA_MAXIMUS_DC 1540 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment) ? IS_FPGA_MAXIMUS_DC 699 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c if (IS_FPGA_MAXIMUS_DC(dsc20->base.ctx->dce_environment)) { IS_FPGA_MAXIMUS_DC 1636 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { IS_FPGA_MAXIMUS_DC 2154 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { IS_FPGA_MAXIMUS_DC 3720 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment) ? IS_FPGA_MAXIMUS_DC 1450 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) IS_FPGA_MAXIMUS_DC 1650 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment) ? IS_FPGA_MAXIMUS_DC 69 drivers/gpu/drm/amd/display/dc/gpio/hw_factory.c if (IS_FPGA_MAXIMUS_DC(dce_environment)) { IS_FPGA_MAXIMUS_DC 67 drivers/gpu/drm/amd/display/dc/gpio/hw_translate.c if (IS_FPGA_MAXIMUS_DC(dce_environment)) {