AR7_REGS_BASE 84 arch/mips/ar7/setup.c io_base = (unsigned long)ioremap(AR7_REGS_BASE, 0x10000); AR7_REGS_BASE 20 arch/mips/include/asm/mach-ar7/ar7.h #define AR7_REGS_MAC0 (AR7_REGS_BASE + 0x0000) AR7_REGS_BASE 21 arch/mips/include/asm/mach-ar7/ar7.h #define AR7_REGS_GPIO (AR7_REGS_BASE + 0x0900) AR7_REGS_BASE 23 arch/mips/include/asm/mach-ar7/ar7.h #define AR7_REGS_POWER (AR7_REGS_BASE + 0x0a00) AR7_REGS_BASE 26 arch/mips/include/asm/mach-ar7/ar7.h #define AR7_REGS_UART0 (AR7_REGS_BASE + 0x0e00) AR7_REGS_BASE 27 arch/mips/include/asm/mach-ar7/ar7.h #define AR7_REGS_USB (AR7_REGS_BASE + 0x1200) AR7_REGS_BASE 28 arch/mips/include/asm/mach-ar7/ar7.h #define AR7_REGS_RESET (AR7_REGS_BASE + 0x1600) AR7_REGS_BASE 29 arch/mips/include/asm/mach-ar7/ar7.h #define AR7_REGS_PINSEL (AR7_REGS_BASE + 0x160C) AR7_REGS_BASE 30 arch/mips/include/asm/mach-ar7/ar7.h #define AR7_REGS_VLYNQ0 (AR7_REGS_BASE + 0x1800) AR7_REGS_BASE 31 arch/mips/include/asm/mach-ar7/ar7.h #define AR7_REGS_DCL (AR7_REGS_BASE + 0x1a00) AR7_REGS_BASE 32 arch/mips/include/asm/mach-ar7/ar7.h #define AR7_REGS_VLYNQ1 (AR7_REGS_BASE + 0x1c00) AR7_REGS_BASE 33 arch/mips/include/asm/mach-ar7/ar7.h #define AR7_REGS_MDIO (AR7_REGS_BASE + 0x1e00) AR7_REGS_BASE 34 arch/mips/include/asm/mach-ar7/ar7.h #define AR7_REGS_IRQ (AR7_REGS_BASE + 0x2400) AR7_REGS_BASE 35 arch/mips/include/asm/mach-ar7/ar7.h #define AR7_REGS_MAC1 (AR7_REGS_BASE + 0x2800) AR7_REGS_BASE 37 arch/mips/include/asm/mach-ar7/ar7.h #define AR7_REGS_WDT (AR7_REGS_BASE + 0x1f00) AR7_REGS_BASE 38 arch/mips/include/asm/mach-ar7/ar7.h #define UR8_REGS_WDT (AR7_REGS_BASE + 0x0b00) AR7_REGS_BASE 39 arch/mips/include/asm/mach-ar7/ar7.h #define UR8_REGS_UART1 (AR7_REGS_BASE + 0x0f00) AR7_REGS_BASE 46 arch/mips/include/asm/mach-ar7/ar7.h #define TITAN_REGS_VLYNQ0 (AR7_REGS_BASE + 0x1c00) AR7_REGS_BASE 47 arch/mips/include/asm/mach-ar7/ar7.h #define TITAN_REGS_VLYNQ1 (AR7_REGS_BASE + 0x1300)