IRQ_INT_RX_RDY    254 drivers/net/ethernet/hisilicon/hisi_femac.c 	while (readl(priv->glb_base + GLB_IRQ_RAW) & IRQ_INT_RX_RDY) {
IRQ_INT_RX_RDY    260 drivers/net/ethernet/hisilicon/hisi_femac.c 		writel(IRQ_INT_RX_RDY, priv->glb_base + GLB_IRQ_RAW);