IRQ_CONTROL_REG_OFFSET 82 arch/arm/mach-omap1/irq.c writel_relaxed(0x1, irq_banks[1].va + IRQ_CONTROL_REG_OFFSET); IRQ_CONTROL_REG_OFFSET 84 arch/arm/mach-omap1/irq.c writel_relaxed(0x1, irq_banks[0].va + IRQ_CONTROL_REG_OFFSET); IRQ_CONTROL_REG_OFFSET 251 arch/arm/mach-omap1/irq.c irq_bank_writel(0x03, 0, IRQ_CONTROL_REG_OFFSET); IRQ_CONTROL_REG_OFFSET 252 arch/arm/mach-omap1/irq.c irq_bank_writel(0x03, 1, IRQ_CONTROL_REG_OFFSET);