IPP_SIZE_LIMIT   1231 drivers/gpu/drm/exynos/exynos_drm_fimc.c 	{ IPP_SIZE_LIMIT(BUFFER, .h = { 16, 8192, 8 }, .v = { 16, 8192, 2 }) },
IPP_SIZE_LIMIT   1232 drivers/gpu/drm/exynos/exynos_drm_fimc.c 	{ IPP_SIZE_LIMIT(AREA, .h = { 16, 4224, 2 }, .v = { 16, 0, 2 }) },
IPP_SIZE_LIMIT   1233 drivers/gpu/drm/exynos/exynos_drm_fimc.c 	{ IPP_SIZE_LIMIT(ROTATED, .h = { 128, 1920 }, .v = { 128, 0 }) },
IPP_SIZE_LIMIT   1239 drivers/gpu/drm/exynos/exynos_drm_fimc.c 	{ IPP_SIZE_LIMIT(BUFFER, .h = { 16, 8192, 8 }, .v = { 16, 8192, 2 }) },
IPP_SIZE_LIMIT   1240 drivers/gpu/drm/exynos/exynos_drm_fimc.c 	{ IPP_SIZE_LIMIT(AREA, .h = { 16, 1920, 2 }, .v = { 16, 0, 2 }) },
IPP_SIZE_LIMIT   1241 drivers/gpu/drm/exynos/exynos_drm_fimc.c 	{ IPP_SIZE_LIMIT(ROTATED, .h = { 128, 1366 }, .v = { 128, 0 }) },
IPP_SIZE_LIMIT   1247 drivers/gpu/drm/exynos/exynos_drm_fimc.c 	{ IPP_SIZE_LIMIT(BUFFER, .h = { 128, 1920, 128 }, .v = { 32, 1920, 32 }) },
IPP_SIZE_LIMIT   1248 drivers/gpu/drm/exynos/exynos_drm_fimc.c 	{ IPP_SIZE_LIMIT(AREA, .h = { 128, 1920, 2 }, .v = { 128, 0, 2 }) },
IPP_SIZE_LIMIT   1254 drivers/gpu/drm/exynos/exynos_drm_fimc.c 	{ IPP_SIZE_LIMIT(BUFFER, .h = { 128, 1920, 128 }, .v = { 32, 1920, 32 }) },
IPP_SIZE_LIMIT   1255 drivers/gpu/drm/exynos/exynos_drm_fimc.c 	{ IPP_SIZE_LIMIT(AREA, .h = { 128, 1366, 2 }, .v = { 128, 0, 2 }) },
IPP_SIZE_LIMIT   1362 drivers/gpu/drm/exynos/exynos_drm_gsc.c 	{ IPP_SIZE_LIMIT(BUFFER, .h = { 32, 4800, 8 }, .v = { 16, 3344, 8 }) },
IPP_SIZE_LIMIT   1363 drivers/gpu/drm/exynos/exynos_drm_gsc.c 	{ IPP_SIZE_LIMIT(AREA, .h = { 16, 4800, 2 }, .v = { 8, 3344, 2 }) },
IPP_SIZE_LIMIT   1364 drivers/gpu/drm/exynos/exynos_drm_gsc.c 	{ IPP_SIZE_LIMIT(ROTATED, .h = { 32, 2048 }, .v = { 16, 2048 }) },
IPP_SIZE_LIMIT   1370 drivers/gpu/drm/exynos/exynos_drm_gsc.c 	{ IPP_SIZE_LIMIT(BUFFER, .h = { 32, 4800, 8 }, .v = { 16, 3344, 8 }) },
IPP_SIZE_LIMIT   1371 drivers/gpu/drm/exynos/exynos_drm_gsc.c 	{ IPP_SIZE_LIMIT(AREA, .h = { 16, 4800, 2 }, .v = { 8, 3344, 2 }) },
IPP_SIZE_LIMIT   1372 drivers/gpu/drm/exynos/exynos_drm_gsc.c 	{ IPP_SIZE_LIMIT(ROTATED, .h = { 16, 2016 }, .v = { 8, 2016 }) },
IPP_SIZE_LIMIT   1378 drivers/gpu/drm/exynos/exynos_drm_gsc.c 	{ IPP_SIZE_LIMIT(BUFFER, .h = { 32, 8191, 16 }, .v = { 16, 8191, 2 }) },
IPP_SIZE_LIMIT   1379 drivers/gpu/drm/exynos/exynos_drm_gsc.c 	{ IPP_SIZE_LIMIT(AREA, .h = { 16, 4800, 1 }, .v = { 8, 3344, 1 }) },
IPP_SIZE_LIMIT   1380 drivers/gpu/drm/exynos/exynos_drm_gsc.c 	{ IPP_SIZE_LIMIT(ROTATED, .h = { 32, 2047 }, .v = { 8, 8191 }) },
IPP_SIZE_LIMIT    360 drivers/gpu/drm/exynos/exynos_drm_rotator.c 	{ IPP_SIZE_LIMIT(BUFFER, .h = { 8, SZ_16K }, .v = { 8, SZ_16K }) },
IPP_SIZE_LIMIT    361 drivers/gpu/drm/exynos/exynos_drm_rotator.c 	{ IPP_SIZE_LIMIT(AREA, .h.align = 2, .v.align = 2) },
IPP_SIZE_LIMIT    365 drivers/gpu/drm/exynos/exynos_drm_rotator.c 	{ IPP_SIZE_LIMIT(BUFFER, .h = { 8, SZ_16K }, .v = { 8, SZ_16K }) },
IPP_SIZE_LIMIT    366 drivers/gpu/drm/exynos/exynos_drm_rotator.c 	{ IPP_SIZE_LIMIT(AREA, .h.align = 4, .v.align = 4) },
IPP_SIZE_LIMIT    370 drivers/gpu/drm/exynos/exynos_drm_rotator.c 	{ IPP_SIZE_LIMIT(BUFFER, .h = { 8, SZ_8K }, .v = { 8, SZ_8K }) },
IPP_SIZE_LIMIT    371 drivers/gpu/drm/exynos/exynos_drm_rotator.c 	{ IPP_SIZE_LIMIT(AREA, .h.align = 4, .v.align = 4) },
IPP_SIZE_LIMIT    375 drivers/gpu/drm/exynos/exynos_drm_rotator.c 	{ IPP_SIZE_LIMIT(BUFFER, .h = { 8, SZ_8K }, .v = { 8, SZ_8K }) },
IPP_SIZE_LIMIT    376 drivers/gpu/drm/exynos/exynos_drm_rotator.c 	{ IPP_SIZE_LIMIT(AREA, .h.align = 2, .v.align = 2) },
IPP_SIZE_LIMIT    380 drivers/gpu/drm/exynos/exynos_drm_rotator.c 	{ IPP_SIZE_LIMIT(BUFFER, .h = { 32, SZ_64K }, .v = { 32, SZ_64K }) },
IPP_SIZE_LIMIT    381 drivers/gpu/drm/exynos/exynos_drm_rotator.c 	{ IPP_SIZE_LIMIT(AREA, .h.align = 8, .v.align = 8) },
IPP_SIZE_LIMIT    385 drivers/gpu/drm/exynos/exynos_drm_rotator.c 	{ IPP_SIZE_LIMIT(BUFFER, .h = { 32, SZ_64K }, .v = { 32, SZ_64K }) },
IPP_SIZE_LIMIT    386 drivers/gpu/drm/exynos/exynos_drm_rotator.c 	{ IPP_SIZE_LIMIT(AREA, .h.align = 8, .v.align = 8) },
IPP_SIZE_LIMIT    390 drivers/gpu/drm/exynos/exynos_drm_rotator.c 	{ IPP_SIZE_LIMIT(BUFFER, .h = { 32, SZ_32K }, .v = { 32, SZ_32K }) },
IPP_SIZE_LIMIT    391 drivers/gpu/drm/exynos/exynos_drm_rotator.c 	{ IPP_SIZE_LIMIT(AREA, .h.align = 8, .v.align = 8) },
IPP_SIZE_LIMIT    597 drivers/gpu/drm/exynos/exynos_drm_scaler.c 	{ IPP_SIZE_LIMIT(BUFFER, .h = { 16, SZ_8K }, .v = { 16, SZ_8K }) },
IPP_SIZE_LIMIT    598 drivers/gpu/drm/exynos/exynos_drm_scaler.c 	{ IPP_SIZE_LIMIT(AREA, .h.align = 2, .v.align = 2) },
IPP_SIZE_LIMIT    604 drivers/gpu/drm/exynos/exynos_drm_scaler.c 	{ IPP_SIZE_LIMIT(BUFFER, .h = { 16, SZ_8K }, .v = { 16, SZ_8K }) },
IPP_SIZE_LIMIT    605 drivers/gpu/drm/exynos/exynos_drm_scaler.c 	{ IPP_SIZE_LIMIT(AREA, .h.align = 2, .v.align = 1) },
IPP_SIZE_LIMIT    611 drivers/gpu/drm/exynos/exynos_drm_scaler.c 	{ IPP_SIZE_LIMIT(BUFFER, .h = { 16, SZ_8K }, .v = { 16, SZ_8K }) },
IPP_SIZE_LIMIT    617 drivers/gpu/drm/exynos/exynos_drm_scaler.c 	{ IPP_SIZE_LIMIT(BUFFER, .h = { 16, SZ_8K }, .v = { 16, SZ_8K })},
IPP_SIZE_LIMIT    618 drivers/gpu/drm/exynos/exynos_drm_scaler.c 	{ IPP_SIZE_LIMIT(AREA, .h.align = 16, .v.align = 16) },