IPP_SF 68 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(CUR_UPDATE, CURSOR_UPDATE_LOCK, mask_sh), \ IPP_SF 69 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(CUR_CONTROL, CURSOR_EN, mask_sh), \ IPP_SF 70 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(CUR_CONTROL, CURSOR_MODE, mask_sh), \ IPP_SF 71 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(CUR_CONTROL, CURSOR_2X_MAGNIFY, mask_sh), \ IPP_SF 72 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(CUR_CONTROL, CUR_INV_TRANS_CLAMP, mask_sh), \ IPP_SF 73 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(CUR_POSITION, CURSOR_X_POSITION, mask_sh), \ IPP_SF 74 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(CUR_POSITION, CURSOR_Y_POSITION, mask_sh), \ IPP_SF 75 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(CUR_HOT_SPOT, CURSOR_HOT_SPOT_X, mask_sh), \ IPP_SF 76 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(CUR_HOT_SPOT, CURSOR_HOT_SPOT_Y, mask_sh), \ IPP_SF 77 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(CUR_COLOR1, CUR_COLOR1_BLUE, mask_sh), \ IPP_SF 78 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(CUR_COLOR1, CUR_COLOR1_GREEN, mask_sh), \ IPP_SF 79 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(CUR_COLOR1, CUR_COLOR1_RED, mask_sh), \ IPP_SF 80 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(CUR_COLOR2, CUR_COLOR2_BLUE, mask_sh), \ IPP_SF 81 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(CUR_COLOR2, CUR_COLOR2_GREEN, mask_sh), \ IPP_SF 82 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(CUR_COLOR2, CUR_COLOR2_RED, mask_sh), \ IPP_SF 83 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(CUR_SIZE, CURSOR_WIDTH, mask_sh), \ IPP_SF 84 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(CUR_SIZE, CURSOR_HEIGHT, mask_sh), \ IPP_SF 85 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(CUR_SURFACE_ADDRESS_HIGH, CURSOR_SURFACE_ADDRESS_HIGH, mask_sh), \ IPP_SF 86 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(CUR_SURFACE_ADDRESS, CURSOR_SURFACE_ADDRESS, mask_sh), \ IPP_SF 87 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(PRESCALE_GRPH_CONTROL, GRPH_PRESCALE_BYPASS, mask_sh), \ IPP_SF 88 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(PRESCALE_VALUES_GRPH_R, GRPH_PRESCALE_SCALE_R, mask_sh), \ IPP_SF 89 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(PRESCALE_VALUES_GRPH_R, GRPH_PRESCALE_BIAS_R, mask_sh), \ IPP_SF 90 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(PRESCALE_VALUES_GRPH_G, GRPH_PRESCALE_SCALE_G, mask_sh), \ IPP_SF 91 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(PRESCALE_VALUES_GRPH_G, GRPH_PRESCALE_BIAS_G, mask_sh), \ IPP_SF 92 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(PRESCALE_VALUES_GRPH_B, GRPH_PRESCALE_SCALE_B, mask_sh), \ IPP_SF 93 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(PRESCALE_VALUES_GRPH_B, GRPH_PRESCALE_BIAS_B, mask_sh), \ IPP_SF 94 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(INPUT_GAMMA_CONTROL, GRPH_INPUT_GAMMA_MODE, mask_sh), \ IPP_SF 95 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DC_LUT_WRITE_EN_MASK, DC_LUT_WRITE_EN_MASK, mask_sh), \ IPP_SF 96 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DC_LUT_RW_MODE, DC_LUT_RW_MODE, mask_sh), \ IPP_SF 97 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DC_LUT_CONTROL, DC_LUT_DATA_R_FORMAT, mask_sh), \ IPP_SF 98 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DC_LUT_CONTROL, DC_LUT_DATA_G_FORMAT, mask_sh), \ IPP_SF 99 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DC_LUT_CONTROL, DC_LUT_DATA_B_FORMAT, mask_sh), \ IPP_SF 100 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DC_LUT_RW_INDEX, DC_LUT_RW_INDEX, mask_sh), \ IPP_SF 101 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DC_LUT_SEQ_COLOR, DC_LUT_SEQ_COLOR, mask_sh), \ IPP_SF 102 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DEGAMMA_CONTROL, GRPH_DEGAMMA_MODE, mask_sh), \ IPP_SF 103 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DEGAMMA_CONTROL, CURSOR_DEGAMMA_MODE, mask_sh), \ IPP_SF 104 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DEGAMMA_CONTROL, CURSOR2_DEGAMMA_MODE, mask_sh) IPP_SF 108 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCFE_MEM_PWR_CTRL, DCP_LUT_MEM_PWR_DIS, mask_sh) IPP_SF 111 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_CUR_UPDATE, CURSOR_UPDATE_LOCK, mask_sh), \ IPP_SF 112 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_CUR_CONTROL, CURSOR_EN, mask_sh), \ IPP_SF 113 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_CUR_CONTROL, CURSOR_MODE, mask_sh), \ IPP_SF 114 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_CUR_CONTROL, CURSOR_2X_MAGNIFY, mask_sh), \ IPP_SF 115 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_CUR_CONTROL, CUR_INV_TRANS_CLAMP, mask_sh), \ IPP_SF 116 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_CUR_POSITION, CURSOR_X_POSITION, mask_sh), \ IPP_SF 117 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_CUR_POSITION, CURSOR_Y_POSITION, mask_sh), \ IPP_SF 118 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_CUR_HOT_SPOT, CURSOR_HOT_SPOT_X, mask_sh), \ IPP_SF 119 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_CUR_HOT_SPOT, CURSOR_HOT_SPOT_Y, mask_sh), \ IPP_SF 120 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_CUR_COLOR1, CUR_COLOR1_BLUE, mask_sh), \ IPP_SF 121 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_CUR_COLOR1, CUR_COLOR1_GREEN, mask_sh), \ IPP_SF 122 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_CUR_COLOR1, CUR_COLOR1_RED, mask_sh), \ IPP_SF 123 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_CUR_COLOR2, CUR_COLOR2_BLUE, mask_sh), \ IPP_SF 124 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_CUR_COLOR2, CUR_COLOR2_GREEN, mask_sh), \ IPP_SF 125 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_CUR_COLOR2, CUR_COLOR2_RED, mask_sh), \ IPP_SF 126 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_CUR_SIZE, CURSOR_WIDTH, mask_sh), \ IPP_SF 127 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_CUR_SIZE, CURSOR_HEIGHT, mask_sh), \ IPP_SF 128 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_CUR_SURFACE_ADDRESS_HIGH, CURSOR_SURFACE_ADDRESS_HIGH, mask_sh), \ IPP_SF 129 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_CUR_SURFACE_ADDRESS, CURSOR_SURFACE_ADDRESS, mask_sh), \ IPP_SF 130 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_PRESCALE_GRPH_CONTROL, GRPH_PRESCALE_BYPASS, mask_sh), \ IPP_SF 131 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_PRESCALE_VALUES_GRPH_R, GRPH_PRESCALE_SCALE_R, mask_sh), \ IPP_SF 132 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_PRESCALE_VALUES_GRPH_R, GRPH_PRESCALE_BIAS_R, mask_sh), \ IPP_SF 133 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_PRESCALE_VALUES_GRPH_G, GRPH_PRESCALE_SCALE_G, mask_sh), \ IPP_SF 134 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_PRESCALE_VALUES_GRPH_G, GRPH_PRESCALE_BIAS_G, mask_sh), \ IPP_SF 135 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_PRESCALE_VALUES_GRPH_B, GRPH_PRESCALE_SCALE_B, mask_sh), \ IPP_SF 136 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_PRESCALE_VALUES_GRPH_B, GRPH_PRESCALE_BIAS_B, mask_sh), \ IPP_SF 137 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_INPUT_GAMMA_CONTROL, GRPH_INPUT_GAMMA_MODE, mask_sh), \ IPP_SF 138 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCFE0_DCFE_MEM_PWR_CTRL, DCP_LUT_MEM_PWR_DIS, mask_sh), \ IPP_SF 139 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_DC_LUT_WRITE_EN_MASK, DC_LUT_WRITE_EN_MASK, mask_sh), \ IPP_SF 140 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_DC_LUT_RW_MODE, DC_LUT_RW_MODE, mask_sh), \ IPP_SF 141 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_DC_LUT_CONTROL, DC_LUT_DATA_R_FORMAT, mask_sh), \ IPP_SF 142 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_DC_LUT_CONTROL, DC_LUT_DATA_G_FORMAT, mask_sh), \ IPP_SF 143 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_DC_LUT_CONTROL, DC_LUT_DATA_B_FORMAT, mask_sh), \ IPP_SF 144 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_DC_LUT_RW_INDEX, DC_LUT_RW_INDEX, mask_sh), \ IPP_SF 145 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_DC_LUT_SEQ_COLOR, DC_LUT_SEQ_COLOR, mask_sh), \ IPP_SF 146 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_DEGAMMA_CONTROL, GRPH_DEGAMMA_MODE, mask_sh), \ IPP_SF 147 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_DEGAMMA_CONTROL, CURSOR_DEGAMMA_MODE, mask_sh), \ IPP_SF 148 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h IPP_SF(DCP0_DEGAMMA_CONTROL, CURSOR2_DEGAMMA_MODE, mask_sh) IPP_SF 78 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CNVC_CFG0_CNVC_SURFACE_PIXEL_FORMAT, CNVC_SURFACE_PIXEL_FORMAT, mask_sh), \ IPP_SF 79 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CNVC_CFG0_FORMAT_CONTROL, CNVC_BYPASS, mask_sh), \ IPP_SF 80 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CNVC_CFG0_FORMAT_CONTROL, ALPHA_EN, mask_sh), \ IPP_SF 81 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CNVC_CFG0_FORMAT_CONTROL, FORMAT_EXPANSION_MODE, mask_sh), \ IPP_SF 82 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CNVC_CUR0_CURSOR0_CONTROL, CUR0_MODE, mask_sh), \ IPP_SF 83 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CNVC_CUR0_CURSOR0_COLOR0, CUR0_COLOR0, mask_sh), \ IPP_SF 84 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CNVC_CUR0_CURSOR0_COLOR1, CUR0_COLOR1, mask_sh), \ IPP_SF 85 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CNVC_CUR0_CURSOR0_CONTROL, CUR0_EXPANSION_MODE, mask_sh), \ IPP_SF 86 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CNVC_CUR0_CURSOR0_CONTROL, CUR0_ENABLE, mask_sh) IPP_SF 90 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(HUBPREQ0_CURSOR_SETTINS, CURSOR0_DST_Y_OFFSET, mask_sh), \ IPP_SF 91 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(HUBPREQ0_CURSOR_SETTINS, CURSOR0_CHUNK_HDL_ADJUST, mask_sh), \ IPP_SF 92 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_CURSOR_SURFACE_ADDRESS_HIGH, CURSOR_SURFACE_ADDRESS_HIGH, mask_sh), \ IPP_SF 93 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_CURSOR_SURFACE_ADDRESS, CURSOR_SURFACE_ADDRESS, mask_sh), \ IPP_SF 94 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_CURSOR_SIZE, CURSOR_WIDTH, mask_sh), \ IPP_SF 95 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_CURSOR_SIZE, CURSOR_HEIGHT, mask_sh), \ IPP_SF 96 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_CURSOR_CONTROL, CURSOR_MODE, mask_sh), \ IPP_SF 97 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_CURSOR_CONTROL, CURSOR_2X_MAGNIFY, mask_sh), \ IPP_SF 98 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_CURSOR_CONTROL, CURSOR_PITCH, mask_sh), \ IPP_SF 99 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_CURSOR_CONTROL, CURSOR_LINES_PER_CHUNK, mask_sh), \ IPP_SF 100 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_CURSOR_CONTROL, CURSOR_ENABLE, mask_sh), \ IPP_SF 101 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_CURSOR_POSITION, CURSOR_X_POSITION, mask_sh), \ IPP_SF 102 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_CURSOR_POSITION, CURSOR_Y_POSITION, mask_sh), \ IPP_SF 103 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_CURSOR_HOT_SPOT, CURSOR_HOT_SPOT_X, mask_sh), \ IPP_SF 104 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_CURSOR_HOT_SPOT, CURSOR_HOT_SPOT_Y, mask_sh), \ IPP_SF 105 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_CURSOR_DST_OFFSET, CURSOR_DST_X_OFFSET, mask_sh), \ IPP_SF 106 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CNVC_CFG0_FORMAT_CONTROL, OUTPUT_FP, mask_sh) IPP_SF 111 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(HUBPREQ0_CURSOR_SETTINGS, CURSOR0_DST_Y_OFFSET, mask_sh), \ IPP_SF 112 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(HUBPREQ0_CURSOR_SETTINGS, CURSOR0_CHUNK_HDL_ADJUST, mask_sh), \ IPP_SF 113 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_0_CURSOR_SURFACE_ADDRESS_HIGH, CURSOR_SURFACE_ADDRESS_HIGH, mask_sh), \ IPP_SF 114 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_0_CURSOR_SURFACE_ADDRESS, CURSOR_SURFACE_ADDRESS, mask_sh), \ IPP_SF 115 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_0_CURSOR_SIZE, CURSOR_WIDTH, mask_sh), \ IPP_SF 116 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_0_CURSOR_SIZE, CURSOR_HEIGHT, mask_sh), \ IPP_SF 117 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_MODE, mask_sh), \ IPP_SF 118 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_2X_MAGNIFY, mask_sh), \ IPP_SF 119 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_PITCH, mask_sh), \ IPP_SF 120 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_LINES_PER_CHUNK, mask_sh), \ IPP_SF 121 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_ENABLE, mask_sh), \ IPP_SF 122 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_0_CURSOR_POSITION, CURSOR_X_POSITION, mask_sh), \ IPP_SF 123 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_0_CURSOR_POSITION, CURSOR_Y_POSITION, mask_sh), \ IPP_SF 124 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_0_CURSOR_HOT_SPOT, CURSOR_HOT_SPOT_X, mask_sh), \ IPP_SF 125 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_0_CURSOR_HOT_SPOT, CURSOR_HOT_SPOT_Y, mask_sh), \ IPP_SF 126 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h IPP_SF(CURSOR0_0_CURSOR_DST_OFFSET, CURSOR_DST_X_OFFSET, mask_sh)