IPC_BASE_ADDR      42 drivers/misc/mei/hw-txe-regs.h #define SEC_IPC_INPUT_DOORBELL_REG       (0x0000 + IPC_BASE_ADDR)
IPC_BASE_ADDR      50 drivers/misc/mei/hw-txe-regs.h #define SEC_IPC_INPUT_STATUS_REG         (0x0008 + IPC_BASE_ADDR)
IPC_BASE_ADDR      54 drivers/misc/mei/hw-txe-regs.h #define SEC_IPC_HOST_INT_STATUS_REG      (0x0010 + IPC_BASE_ADDR)
IPC_BASE_ADDR      69 drivers/misc/mei/hw-txe-regs.h #define SEC_IPC_HOST_INT_MASK_REG        (0x0014 + IPC_BASE_ADDR)
IPC_BASE_ADDR      75 drivers/misc/mei/hw-txe-regs.h #define SEC_IPC_INPUT_PAYLOAD_REG        (0x0100 + IPC_BASE_ADDR)
IPC_BASE_ADDR      77 drivers/misc/mei/hw-txe-regs.h #define IPC_SHARED_PAYLOAD_REG           (0x0200 + IPC_BASE_ADDR)