IP0_31_28         563 drivers/pinctrl/sh-pfc/pfc-r8a77470.c 	PINMUX_IPSR_GPSR(IP0_31_28, SD0_WP),
IP0_31_28         564 drivers/pinctrl/sh-pfc/pfc-r8a77470.c 	PINMUX_IPSR_GPSR(IP0_31_28, IRQ7),
IP0_31_28         565 drivers/pinctrl/sh-pfc/pfc-r8a77470.c 	PINMUX_IPSR_MSEL(IP0_31_28, CAN0_TX_A, SEL_CAN0_0),
IP0_31_28         143 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define GPSR2_1		F_(IRQ1,		IP0_31_28)
IP0_31_28         443 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c FM(IP0_31_28)	IP0_31_28	FM(IP1_31_28)	IP1_31_28	FM(IP2_31_28)	IP2_31_28	FM(IP3_31_28)	IP3_31_28 \
IP0_31_28         675 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c 	PINMUX_IPSR_GPSR(IP0_31_28,	IRQ1),
IP0_31_28         676 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c 	PINMUX_IPSR_GPSR(IP0_31_28,	QPOLA),
IP0_31_28         677 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c 	PINMUX_IPSR_GPSR(IP0_31_28,	DU_DISP),
IP0_31_28         678 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c 	PINMUX_IPSR_MSEL(IP0_31_28,	VI4_DATA1_B,		SEL_VIN4_1),
IP0_31_28         679 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c 	PINMUX_IPSR_MSEL(IP0_31_28,	CAN0_RX_B,		SEL_RCAN0_1),
IP0_31_28         680 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c 	PINMUX_IPSR_MSEL(IP0_31_28,	CANFD0_RX_B,		SEL_CANFD0_1),
IP0_31_28        5030 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c 		IP0_31_28
IP0_31_28         144 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define GPSR2_1		F_(IRQ1,		IP0_31_28)
IP0_31_28         453 drivers/pinctrl/sh-pfc/pfc-r8a7795.c FM(IP0_31_28)	IP0_31_28	FM(IP1_31_28)	IP1_31_28	FM(IP2_31_28)	IP2_31_28	FM(IP3_31_28)	IP3_31_28 \
IP0_31_28         682 drivers/pinctrl/sh-pfc/pfc-r8a7795.c 	PINMUX_IPSR_GPSR(IP0_31_28,	IRQ1),
IP0_31_28         683 drivers/pinctrl/sh-pfc/pfc-r8a7795.c 	PINMUX_IPSR_GPSR(IP0_31_28,	QPOLA),
IP0_31_28         684 drivers/pinctrl/sh-pfc/pfc-r8a7795.c 	PINMUX_IPSR_GPSR(IP0_31_28,	DU_DISP),
IP0_31_28         685 drivers/pinctrl/sh-pfc/pfc-r8a7795.c 	PINMUX_IPSR_MSEL(IP0_31_28,	VI4_DATA1_B,		SEL_VIN4_1),
IP0_31_28         686 drivers/pinctrl/sh-pfc/pfc-r8a7795.c 	PINMUX_IPSR_MSEL(IP0_31_28,	CAN0_RX_B,		SEL_RCAN0_1),
IP0_31_28         687 drivers/pinctrl/sh-pfc/pfc-r8a7795.c 	PINMUX_IPSR_MSEL(IP0_31_28,	CANFD0_RX_B,		SEL_CANFD0_1),
IP0_31_28         688 drivers/pinctrl/sh-pfc/pfc-r8a7795.c 	PINMUX_IPSR_MSEL(IP0_31_28,	MSIOF3_SS1_E,		SEL_MSIOF3_4),
IP0_31_28        5375 drivers/pinctrl/sh-pfc/pfc-r8a7795.c 		IP0_31_28
IP0_31_28         148 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define GPSR2_1		F_(IRQ1,		IP0_31_28)
IP0_31_28         457 drivers/pinctrl/sh-pfc/pfc-r8a7796.c FM(IP0_31_28)	IP0_31_28	FM(IP1_31_28)	IP1_31_28	FM(IP2_31_28)	IP2_31_28	FM(IP3_31_28)	IP3_31_28 \
IP0_31_28         686 drivers/pinctrl/sh-pfc/pfc-r8a7796.c 	PINMUX_IPSR_GPSR(IP0_31_28,	IRQ1),
IP0_31_28         687 drivers/pinctrl/sh-pfc/pfc-r8a7796.c 	PINMUX_IPSR_GPSR(IP0_31_28,	QPOLA),
IP0_31_28         688 drivers/pinctrl/sh-pfc/pfc-r8a7796.c 	PINMUX_IPSR_GPSR(IP0_31_28,	DU_DISP),
IP0_31_28         689 drivers/pinctrl/sh-pfc/pfc-r8a7796.c 	PINMUX_IPSR_MSEL(IP0_31_28,	VI4_DATA1_B,		SEL_VIN4_1),
IP0_31_28         690 drivers/pinctrl/sh-pfc/pfc-r8a7796.c 	PINMUX_IPSR_MSEL(IP0_31_28,	CAN0_RX_B,		SEL_RCAN0_1),
IP0_31_28         691 drivers/pinctrl/sh-pfc/pfc-r8a7796.c 	PINMUX_IPSR_MSEL(IP0_31_28,	CANFD0_RX_B,		SEL_CANFD0_1),
IP0_31_28         692 drivers/pinctrl/sh-pfc/pfc-r8a7796.c 	PINMUX_IPSR_MSEL(IP0_31_28,	MSIOF3_SS1_E,		SEL_MSIOF3_4),
IP0_31_28        5343 drivers/pinctrl/sh-pfc/pfc-r8a7796.c 		IP0_31_28
IP0_31_28         149 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define GPSR2_1		F_(IRQ1,		IP0_31_28)
IP0_31_28         458 drivers/pinctrl/sh-pfc/pfc-r8a77965.c FM(IP0_31_28)	IP0_31_28	FM(IP1_31_28)	IP1_31_28	FM(IP2_31_28)	IP2_31_28	FM(IP3_31_28)	IP3_31_28 \
IP0_31_28         688 drivers/pinctrl/sh-pfc/pfc-r8a77965.c 	PINMUX_IPSR_GPSR(IP0_31_28,	IRQ1),
IP0_31_28         689 drivers/pinctrl/sh-pfc/pfc-r8a77965.c 	PINMUX_IPSR_GPSR(IP0_31_28,	QPOLA),
IP0_31_28         690 drivers/pinctrl/sh-pfc/pfc-r8a77965.c 	PINMUX_IPSR_GPSR(IP0_31_28,	DU_DISP),
IP0_31_28         691 drivers/pinctrl/sh-pfc/pfc-r8a77965.c 	PINMUX_IPSR_MSEL(IP0_31_28,	VI4_DATA1_B,		SEL_VIN4_1),
IP0_31_28         692 drivers/pinctrl/sh-pfc/pfc-r8a77965.c 	PINMUX_IPSR_MSEL(IP0_31_28,	CAN0_RX_B,		SEL_RCAN0_1),
IP0_31_28         693 drivers/pinctrl/sh-pfc/pfc-r8a77965.c 	PINMUX_IPSR_MSEL(IP0_31_28,	CANFD0_RX_B,		SEL_CANFD0_1),
IP0_31_28         694 drivers/pinctrl/sh-pfc/pfc-r8a77965.c 	PINMUX_IPSR_MSEL(IP0_31_28,	MSIOF3_SS1_E,		SEL_MSIOF3_4),
IP0_31_28        5583 drivers/pinctrl/sh-pfc/pfc-r8a77965.c 		IP0_31_28
IP0_31_28          49 drivers/pinctrl/sh-pfc/pfc-r8a77970.c #define GPSR0_7		F_(DU_DG3,			IP0_31_28)
IP0_31_28         266 drivers/pinctrl/sh-pfc/pfc-r8a77970.c FM(IP0_31_28)	IP0_31_28	FM(IP1_31_28)	IP1_31_28	FM(IP2_31_28)	IP2_31_28	FM(IP3_31_28)	IP3_31_28 \
IP0_31_28         412 drivers/pinctrl/sh-pfc/pfc-r8a77970.c 	PINMUX_IPSR_GPSR(IP0_31_28,	DU_DG3),
IP0_31_28         413 drivers/pinctrl/sh-pfc/pfc-r8a77970.c 	PINMUX_IPSR_GPSR(IP0_31_28,	MSIOF3_SS2),
IP0_31_28         414 drivers/pinctrl/sh-pfc/pfc-r8a77970.c 	PINMUX_IPSR_GPSR(IP0_31_28,	A7),
IP0_31_28         415 drivers/pinctrl/sh-pfc/pfc-r8a77970.c 	PINMUX_IPSR_GPSR(IP0_31_28,	PWMFSW0),
IP0_31_28        2265 drivers/pinctrl/sh-pfc/pfc-r8a77970.c 		IP0_31_28
IP0_31_28          50 drivers/pinctrl/sh-pfc/pfc-r8a77980.c #define GPSR0_7		F_(DU_DG3,			IP0_31_28)
IP0_31_28         317 drivers/pinctrl/sh-pfc/pfc-r8a77980.c FM(IP0_31_28)	IP0_31_28	FM(IP1_31_28)	IP1_31_28	FM(IP2_31_28)	IP2_31_28	FM(IP3_31_28)	IP3_31_28 \
IP0_31_28         485 drivers/pinctrl/sh-pfc/pfc-r8a77980.c 	PINMUX_IPSR_GPSR(IP0_31_28,	DU_DG3),
IP0_31_28         486 drivers/pinctrl/sh-pfc/pfc-r8a77980.c 	PINMUX_IPSR_GPSR(IP0_31_28,	CPG_CPCKOUT),
IP0_31_28         487 drivers/pinctrl/sh-pfc/pfc-r8a77980.c 	PINMUX_IPSR_GPSR(IP0_31_28,	GETHER_RMII_REFCLK),
IP0_31_28         488 drivers/pinctrl/sh-pfc/pfc-r8a77980.c 	PINMUX_IPSR_GPSR(IP0_31_28,	A7),
IP0_31_28         489 drivers/pinctrl/sh-pfc/pfc-r8a77980.c 	PINMUX_IPSR_GPSR(IP0_31_28,	PWMFSW0),
IP0_31_28        2687 drivers/pinctrl/sh-pfc/pfc-r8a77980.c 		IP0_31_28
IP0_31_28         130 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define GPSR2_8		F_(QSPI1_MISO_IO1,	IP0_31_28)
IP0_31_28         393 drivers/pinctrl/sh-pfc/pfc-r8a77990.c FM(IP0_31_28)	IP0_31_28	FM(IP1_31_28)	IP1_31_28	FM(IP2_31_28)	IP2_31_28	FM(IP3_31_28)	IP3_31_28 \
IP0_31_28         579 drivers/pinctrl/sh-pfc/pfc-r8a77990.c 	PINMUX_IPSR_GPSR(IP0_31_28,		QSPI1_MISO_IO1),
IP0_31_28         580 drivers/pinctrl/sh-pfc/pfc-r8a77990.c 	PINMUX_IPSR_MSEL(IP0_31_28,		RIF2_D0_A,	SEL_DRIF2_0),
IP0_31_28         581 drivers/pinctrl/sh-pfc/pfc-r8a77990.c 	PINMUX_IPSR_MSEL(IP0_31_28,		HRX4_B,		SEL_HSCIF4_1),
IP0_31_28         582 drivers/pinctrl/sh-pfc/pfc-r8a77990.c 	PINMUX_IPSR_MSEL(IP0_31_28,		VI4_DATA2_A,	SEL_VIN4_0),
IP0_31_28        4769 drivers/pinctrl/sh-pfc/pfc-r8a77990.c 		IP0_31_28
IP0_31_28          77 drivers/pinctrl/sh-pfc/pfc-r8a77995.c #define GPSR1_0		F_(DU_DB0,		IP0_31_28)
IP0_31_28         356 drivers/pinctrl/sh-pfc/pfc-r8a77995.c FM(IP0_31_28)	IP0_31_28	FM(IP1_31_28)	IP1_31_28	FM(IP2_31_28)	IP2_31_28	FM(IP3_31_28)	IP3_31_28 \
IP0_31_28         549 drivers/pinctrl/sh-pfc/pfc-r8a77995.c 	PINMUX_IPSR_GPSR(IP0_31_28,	DU_DB0),
IP0_31_28         550 drivers/pinctrl/sh-pfc/pfc-r8a77995.c 	PINMUX_IPSR_GPSR(IP0_31_28,	LCDOUT0),
IP0_31_28         551 drivers/pinctrl/sh-pfc/pfc-r8a77995.c 	PINMUX_IPSR_MSEL(IP0_31_28,	MSIOF3_TXD_B, SEL_MSIOF3_1),
IP0_31_28        2622 drivers/pinctrl/sh-pfc/pfc-r8a77995.c 		IP0_31_28