IO_IRQ_NR         429 arch/mips/dec/setup.c 	[DEC_IRQ_ASC]		= IO_IRQ_NR(KN02BA_IO_INR_ASC),
IO_IRQ_NR         434 arch/mips/dec/setup.c 	[DEC_IRQ_LANCE]		= IO_IRQ_NR(KN02BA_IO_INR_LANCE),
IO_IRQ_NR         435 arch/mips/dec/setup.c 	[DEC_IRQ_BUS]		= IO_IRQ_NR(KN02BA_IO_INR_BUS),
IO_IRQ_NR         436 arch/mips/dec/setup.c 	[DEC_IRQ_PSU]		= IO_IRQ_NR(KN02BA_IO_INR_PSU),
IO_IRQ_NR         437 arch/mips/dec/setup.c 	[DEC_IRQ_RTC]		= IO_IRQ_NR(KN02BA_IO_INR_RTC),
IO_IRQ_NR         438 arch/mips/dec/setup.c 	[DEC_IRQ_SCC0]		= IO_IRQ_NR(KN02BA_IO_INR_SCC0),
IO_IRQ_NR         439 arch/mips/dec/setup.c 	[DEC_IRQ_SCC1]		= IO_IRQ_NR(KN02BA_IO_INR_SCC1),
IO_IRQ_NR         446 arch/mips/dec/setup.c 	[DEC_IRQ_ASC_MERR]	= IO_IRQ_NR(IO_INR_ASC_MERR),
IO_IRQ_NR         447 arch/mips/dec/setup.c 	[DEC_IRQ_ASC_ERR]	= IO_IRQ_NR(IO_INR_ASC_ERR),
IO_IRQ_NR         448 arch/mips/dec/setup.c 	[DEC_IRQ_ASC_DMA]	= IO_IRQ_NR(IO_INR_ASC_DMA),
IO_IRQ_NR         453 arch/mips/dec/setup.c 	[DEC_IRQ_LANCE_MERR]	= IO_IRQ_NR(IO_INR_LANCE_MERR),
IO_IRQ_NR         454 arch/mips/dec/setup.c 	[DEC_IRQ_SCC0A_RXERR]	= IO_IRQ_NR(IO_INR_SCC0A_RXERR),
IO_IRQ_NR         455 arch/mips/dec/setup.c 	[DEC_IRQ_SCC0A_RXDMA]	= IO_IRQ_NR(IO_INR_SCC0A_RXDMA),
IO_IRQ_NR         456 arch/mips/dec/setup.c 	[DEC_IRQ_SCC0A_TXERR]	= IO_IRQ_NR(IO_INR_SCC0A_TXERR),
IO_IRQ_NR         457 arch/mips/dec/setup.c 	[DEC_IRQ_SCC0A_TXDMA]	= IO_IRQ_NR(IO_INR_SCC0A_TXDMA),
IO_IRQ_NR         462 arch/mips/dec/setup.c 	[DEC_IRQ_SCC1A_RXERR]	= IO_IRQ_NR(IO_INR_SCC1A_RXERR),
IO_IRQ_NR         463 arch/mips/dec/setup.c 	[DEC_IRQ_SCC1A_RXDMA]	= IO_IRQ_NR(IO_INR_SCC1A_RXDMA),
IO_IRQ_NR         464 arch/mips/dec/setup.c 	[DEC_IRQ_SCC1A_TXERR]	= IO_IRQ_NR(IO_INR_SCC1A_TXERR),
IO_IRQ_NR         465 arch/mips/dec/setup.c 	[DEC_IRQ_SCC1A_TXDMA]	= IO_IRQ_NR(IO_INR_SCC1A_TXDMA),
IO_IRQ_NR         483 arch/mips/dec/setup.c 		{ .i = IO_IRQ_NR(KN02BA_IO_INR_BUS) } },
IO_IRQ_NR         485 arch/mips/dec/setup.c 		{ .i = IO_IRQ_NR(KN02BA_IO_INR_RTC) } },
IO_IRQ_NR         489 arch/mips/dec/setup.c 		{ .i = IO_IRQ_NR(KN02BA_IO_INR_SCC0) } },
IO_IRQ_NR         491 arch/mips/dec/setup.c 		{ .i = IO_IRQ_NR(KN02BA_IO_INR_SCC1) } },
IO_IRQ_NR         493 arch/mips/dec/setup.c 		{ .i = IO_IRQ_NR(KN02BA_IO_INR_ASC) } },
IO_IRQ_NR         495 arch/mips/dec/setup.c 		{ .i = IO_IRQ_NR(KN02BA_IO_INR_LANCE) } },
IO_IRQ_NR         527 arch/mips/dec/setup.c 	[DEC_IRQ_AB_RECV]	= IO_IRQ_NR(KN02CA_IO_INR_AB_RECV),
IO_IRQ_NR         528 arch/mips/dec/setup.c 	[DEC_IRQ_AB_XMIT]	= IO_IRQ_NR(KN02CA_IO_INR_AB_XMIT),
IO_IRQ_NR         530 arch/mips/dec/setup.c 	[DEC_IRQ_ASC]		= IO_IRQ_NR(KN02CA_IO_INR_ASC),
IO_IRQ_NR         531 arch/mips/dec/setup.c 	[DEC_IRQ_FLOPPY]	= IO_IRQ_NR(KN02CA_IO_INR_FLOPPY),
IO_IRQ_NR         534 arch/mips/dec/setup.c 	[DEC_IRQ_ISDN]		= IO_IRQ_NR(KN02CA_IO_INR_ISDN),
IO_IRQ_NR         535 arch/mips/dec/setup.c 	[DEC_IRQ_LANCE]		= IO_IRQ_NR(KN02CA_IO_INR_LANCE),
IO_IRQ_NR         539 arch/mips/dec/setup.c 	[DEC_IRQ_SCC0]		= IO_IRQ_NR(KN02CA_IO_INR_SCC0),
IO_IRQ_NR         542 arch/mips/dec/setup.c 	[DEC_IRQ_TC0]		= IO_IRQ_NR(KN02CA_IO_INR_TC0),
IO_IRQ_NR         543 arch/mips/dec/setup.c 	[DEC_IRQ_TC1]		= IO_IRQ_NR(KN02CA_IO_INR_TC1),
IO_IRQ_NR         546 arch/mips/dec/setup.c 	[DEC_IRQ_VIDEO]		= IO_IRQ_NR(KN02CA_IO_INR_VIDEO),
IO_IRQ_NR         547 arch/mips/dec/setup.c 	[DEC_IRQ_ASC_MERR]	= IO_IRQ_NR(IO_INR_ASC_MERR),
IO_IRQ_NR         548 arch/mips/dec/setup.c 	[DEC_IRQ_ASC_ERR]	= IO_IRQ_NR(IO_INR_ASC_ERR),
IO_IRQ_NR         549 arch/mips/dec/setup.c 	[DEC_IRQ_ASC_DMA]	= IO_IRQ_NR(IO_INR_ASC_DMA),
IO_IRQ_NR         550 arch/mips/dec/setup.c 	[DEC_IRQ_FLOPPY_ERR]	= IO_IRQ_NR(IO_INR_FLOPPY_ERR),
IO_IRQ_NR         551 arch/mips/dec/setup.c 	[DEC_IRQ_ISDN_ERR]	= IO_IRQ_NR(IO_INR_ISDN_ERR),
IO_IRQ_NR         552 arch/mips/dec/setup.c 	[DEC_IRQ_ISDN_RXDMA]	= IO_IRQ_NR(IO_INR_ISDN_RXDMA),
IO_IRQ_NR         553 arch/mips/dec/setup.c 	[DEC_IRQ_ISDN_TXDMA]	= IO_IRQ_NR(IO_INR_ISDN_TXDMA),
IO_IRQ_NR         554 arch/mips/dec/setup.c 	[DEC_IRQ_LANCE_MERR]	= IO_IRQ_NR(IO_INR_LANCE_MERR),
IO_IRQ_NR         555 arch/mips/dec/setup.c 	[DEC_IRQ_SCC0A_RXERR]	= IO_IRQ_NR(IO_INR_SCC0A_RXERR),
IO_IRQ_NR         556 arch/mips/dec/setup.c 	[DEC_IRQ_SCC0A_RXDMA]	= IO_IRQ_NR(IO_INR_SCC0A_RXDMA),
IO_IRQ_NR         557 arch/mips/dec/setup.c 	[DEC_IRQ_SCC0A_TXERR]	= IO_IRQ_NR(IO_INR_SCC0A_TXERR),
IO_IRQ_NR         558 arch/mips/dec/setup.c 	[DEC_IRQ_SCC0A_TXDMA]	= IO_IRQ_NR(IO_INR_SCC0A_TXDMA),
IO_IRQ_NR         559 arch/mips/dec/setup.c 	[DEC_IRQ_AB_RXERR]	= IO_IRQ_NR(IO_INR_AB_RXERR),
IO_IRQ_NR         560 arch/mips/dec/setup.c 	[DEC_IRQ_AB_RXDMA]	= IO_IRQ_NR(IO_INR_AB_RXDMA),
IO_IRQ_NR         561 arch/mips/dec/setup.c 	[DEC_IRQ_AB_TXERR]	= IO_IRQ_NR(IO_INR_AB_TXERR),
IO_IRQ_NR         562 arch/mips/dec/setup.c 	[DEC_IRQ_AB_TXDMA]	= IO_IRQ_NR(IO_INR_AB_TXDMA),
IO_IRQ_NR         584 arch/mips/dec/setup.c 		{ .i = IO_IRQ_NR(KN02CA_IO_INR_SCC0) } },
IO_IRQ_NR         586 arch/mips/dec/setup.c 		{ .i = IO_IRQ_NR(KN02CA_IO_INR_ASC) } },
IO_IRQ_NR         588 arch/mips/dec/setup.c 		{ .i = IO_IRQ_NR(KN02CA_IO_INR_LANCE) } },
IO_IRQ_NR         590 arch/mips/dec/setup.c 		{ .i = IO_IRQ_NR(KN02CA_IO_INR_TC1) } },
IO_IRQ_NR         592 arch/mips/dec/setup.c 		{ .i = IO_IRQ_NR(KN02CA_IO_INR_TC0) } },
IO_IRQ_NR         627 arch/mips/dec/setup.c 	[DEC_IRQ_ASC]		= IO_IRQ_NR(KN03_IO_INR_ASC),
IO_IRQ_NR         632 arch/mips/dec/setup.c 	[DEC_IRQ_LANCE]		= IO_IRQ_NR(KN03_IO_INR_LANCE),
IO_IRQ_NR         634 arch/mips/dec/setup.c 	[DEC_IRQ_PSU]		= IO_IRQ_NR(KN03_IO_INR_PSU),
IO_IRQ_NR         636 arch/mips/dec/setup.c 	[DEC_IRQ_SCC0]		= IO_IRQ_NR(KN03_IO_INR_SCC0),
IO_IRQ_NR         637 arch/mips/dec/setup.c 	[DEC_IRQ_SCC1]		= IO_IRQ_NR(KN03_IO_INR_SCC1),
IO_IRQ_NR         639 arch/mips/dec/setup.c 	[DEC_IRQ_TC0]		= IO_IRQ_NR(KN03_IO_INR_TC0),
IO_IRQ_NR         640 arch/mips/dec/setup.c 	[DEC_IRQ_TC1]		= IO_IRQ_NR(KN03_IO_INR_TC1),
IO_IRQ_NR         641 arch/mips/dec/setup.c 	[DEC_IRQ_TC2]		= IO_IRQ_NR(KN03_IO_INR_TC2),
IO_IRQ_NR         644 arch/mips/dec/setup.c 	[DEC_IRQ_ASC_MERR]	= IO_IRQ_NR(IO_INR_ASC_MERR),
IO_IRQ_NR         645 arch/mips/dec/setup.c 	[DEC_IRQ_ASC_ERR]	= IO_IRQ_NR(IO_INR_ASC_ERR),
IO_IRQ_NR         646 arch/mips/dec/setup.c 	[DEC_IRQ_ASC_DMA]	= IO_IRQ_NR(IO_INR_ASC_DMA),
IO_IRQ_NR         651 arch/mips/dec/setup.c 	[DEC_IRQ_LANCE_MERR]	= IO_IRQ_NR(IO_INR_LANCE_MERR),
IO_IRQ_NR         652 arch/mips/dec/setup.c 	[DEC_IRQ_SCC0A_RXERR]	= IO_IRQ_NR(IO_INR_SCC0A_RXERR),
IO_IRQ_NR         653 arch/mips/dec/setup.c 	[DEC_IRQ_SCC0A_RXDMA]	= IO_IRQ_NR(IO_INR_SCC0A_RXDMA),
IO_IRQ_NR         654 arch/mips/dec/setup.c 	[DEC_IRQ_SCC0A_TXERR]	= IO_IRQ_NR(IO_INR_SCC0A_TXERR),
IO_IRQ_NR         655 arch/mips/dec/setup.c 	[DEC_IRQ_SCC0A_TXDMA]	= IO_IRQ_NR(IO_INR_SCC0A_TXDMA),
IO_IRQ_NR         660 arch/mips/dec/setup.c 	[DEC_IRQ_SCC1A_RXERR]	= IO_IRQ_NR(IO_INR_SCC1A_RXERR),
IO_IRQ_NR         661 arch/mips/dec/setup.c 	[DEC_IRQ_SCC1A_RXDMA]	= IO_IRQ_NR(IO_INR_SCC1A_RXDMA),
IO_IRQ_NR         662 arch/mips/dec/setup.c 	[DEC_IRQ_SCC1A_TXERR]	= IO_IRQ_NR(IO_INR_SCC1A_TXERR),
IO_IRQ_NR         663 arch/mips/dec/setup.c 	[DEC_IRQ_SCC1A_TXDMA]	= IO_IRQ_NR(IO_INR_SCC1A_TXDMA),
IO_IRQ_NR         681 arch/mips/dec/setup.c 		{ .i = IO_IRQ_NR(KN03_IO_INR_SCC0) } },
IO_IRQ_NR         683 arch/mips/dec/setup.c 		{ .i = IO_IRQ_NR(KN03_IO_INR_SCC1) } },
IO_IRQ_NR         685 arch/mips/dec/setup.c 		{ .i = IO_IRQ_NR(KN03_IO_INR_ASC) } },
IO_IRQ_NR         687 arch/mips/dec/setup.c 		{ .i = IO_IRQ_NR(KN03_IO_INR_LANCE) } },
IO_IRQ_NR         689 arch/mips/dec/setup.c 		{ .i = IO_IRQ_NR(KN03_IO_INR_TC2) } },
IO_IRQ_NR         691 arch/mips/dec/setup.c 		{ .i = IO_IRQ_NR(KN03_IO_INR_TC1) } },
IO_IRQ_NR         693 arch/mips/dec/setup.c 		{ .i = IO_IRQ_NR(KN03_IO_INR_TC0) } },