IOASIC_SLOT_SIZE   97 arch/mips/dec/prom/identify.c 	dec_kn_slot_size = IOASIC_SLOT_SIZE;
IOASIC_SLOT_SIZE  107 arch/mips/dec/prom/identify.c 	dec_kn_slot_size = IOASIC_SLOT_SIZE;
IOASIC_SLOT_SIZE   26 arch/mips/include/asm/dec/ioasic_addrs.h #define IOASIC_SYS_ROM	(0*IOASIC_SLOT_SIZE)	/* system board ROM */
IOASIC_SLOT_SIZE   27 arch/mips/include/asm/dec/ioasic_addrs.h #define IOASIC_IOCTL	(1*IOASIC_SLOT_SIZE)	/* I/O ASIC */
IOASIC_SLOT_SIZE   28 arch/mips/include/asm/dec/ioasic_addrs.h #define IOASIC_ESAR	(2*IOASIC_SLOT_SIZE)	/* LANCE MAC address chip */
IOASIC_SLOT_SIZE   29 arch/mips/include/asm/dec/ioasic_addrs.h #define IOASIC_LANCE	(3*IOASIC_SLOT_SIZE)	/* LANCE Ethernet */
IOASIC_SLOT_SIZE   30 arch/mips/include/asm/dec/ioasic_addrs.h #define IOASIC_SCC0	(4*IOASIC_SLOT_SIZE)	/* SCC #0 */
IOASIC_SLOT_SIZE   31 arch/mips/include/asm/dec/ioasic_addrs.h #define IOASIC_VDAC_HI	(5*IOASIC_SLOT_SIZE)	/* VDAC (maxine) */
IOASIC_SLOT_SIZE   32 arch/mips/include/asm/dec/ioasic_addrs.h #define IOASIC_SCC1	(6*IOASIC_SLOT_SIZE)	/* SCC #1 (3min, 3max+) */
IOASIC_SLOT_SIZE   33 arch/mips/include/asm/dec/ioasic_addrs.h #define IOASIC_VDAC_LO	(7*IOASIC_SLOT_SIZE)	/* VDAC (maxine) */
IOASIC_SLOT_SIZE   34 arch/mips/include/asm/dec/ioasic_addrs.h #define IOASIC_TOY	(8*IOASIC_SLOT_SIZE)	/* RTC */
IOASIC_SLOT_SIZE   35 arch/mips/include/asm/dec/ioasic_addrs.h #define IOASIC_ISDN	(9*IOASIC_SLOT_SIZE)	/* ISDN (maxine) */
IOASIC_SLOT_SIZE   36 arch/mips/include/asm/dec/ioasic_addrs.h #define IOASIC_ERRADDR	(9*IOASIC_SLOT_SIZE)	/* bus error address (3max+) */
IOASIC_SLOT_SIZE   37 arch/mips/include/asm/dec/ioasic_addrs.h #define IOASIC_CHKSYN	(10*IOASIC_SLOT_SIZE)	/* ECC syndrome (3max+) */
IOASIC_SLOT_SIZE   38 arch/mips/include/asm/dec/ioasic_addrs.h #define IOASIC_ACC_BUS	(10*IOASIC_SLOT_SIZE)	/* ACCESS.bus (maxine) */
IOASIC_SLOT_SIZE   39 arch/mips/include/asm/dec/ioasic_addrs.h #define IOASIC_MCR	(11*IOASIC_SLOT_SIZE)	/* memory control (3max+) */
IOASIC_SLOT_SIZE   40 arch/mips/include/asm/dec/ioasic_addrs.h #define IOASIC_FLOPPY	(11*IOASIC_SLOT_SIZE)	/* FDC (maxine) */
IOASIC_SLOT_SIZE   41 arch/mips/include/asm/dec/ioasic_addrs.h #define IOASIC_SCSI	(12*IOASIC_SLOT_SIZE)	/* ASC SCSI */
IOASIC_SLOT_SIZE   42 arch/mips/include/asm/dec/ioasic_addrs.h #define IOASIC_FDC_DMA	(13*IOASIC_SLOT_SIZE)	/* FDC DMA (maxine) */
IOASIC_SLOT_SIZE   43 arch/mips/include/asm/dec/ioasic_addrs.h #define IOASIC_SCSI_DMA	(14*IOASIC_SLOT_SIZE)	/* ??? */
IOASIC_SLOT_SIZE   44 arch/mips/include/asm/dec/ioasic_addrs.h #define IOASIC_RES_15	(15*IOASIC_SLOT_SIZE)	/* unused? */
IOASIC_SLOT_SIZE   30 arch/mips/include/asm/dec/kn05.h #define KN4K_MB_ROM	(0*IOASIC_SLOT_SIZE)	/* KN05/KN04 card ROM */
IOASIC_SLOT_SIZE   31 arch/mips/include/asm/dec/kn05.h #define KN4K_IOCTL	(1*IOASIC_SLOT_SIZE)	/* I/O ASIC */
IOASIC_SLOT_SIZE   32 arch/mips/include/asm/dec/kn05.h #define KN4K_ESAR	(2*IOASIC_SLOT_SIZE)	/* LANCE MAC address chip */
IOASIC_SLOT_SIZE   33 arch/mips/include/asm/dec/kn05.h #define KN4K_LANCE	(3*IOASIC_SLOT_SIZE)	/* LANCE Ethernet */
IOASIC_SLOT_SIZE   34 arch/mips/include/asm/dec/kn05.h #define KN4K_MB_INT	(4*IOASIC_SLOT_SIZE)	/* MB interrupt register */
IOASIC_SLOT_SIZE   35 arch/mips/include/asm/dec/kn05.h #define KN4K_MB_EA	(5*IOASIC_SLOT_SIZE)	/* MB error address? */
IOASIC_SLOT_SIZE   36 arch/mips/include/asm/dec/kn05.h #define KN4K_MB_EC	(6*IOASIC_SLOT_SIZE)	/* MB error ??? */
IOASIC_SLOT_SIZE   37 arch/mips/include/asm/dec/kn05.h #define KN4K_MB_CSR	(7*IOASIC_SLOT_SIZE)	/* MB control & status */
IOASIC_SLOT_SIZE   38 arch/mips/include/asm/dec/kn05.h #define KN4K_RES_08	(8*IOASIC_SLOT_SIZE)	/* unused? */
IOASIC_SLOT_SIZE   39 arch/mips/include/asm/dec/kn05.h #define KN4K_RES_09	(9*IOASIC_SLOT_SIZE)	/* unused? */
IOASIC_SLOT_SIZE   40 arch/mips/include/asm/dec/kn05.h #define KN4K_RES_10	(10*IOASIC_SLOT_SIZE)	/* unused? */
IOASIC_SLOT_SIZE   41 arch/mips/include/asm/dec/kn05.h #define KN4K_RES_11	(11*IOASIC_SLOT_SIZE)	/* unused? */
IOASIC_SLOT_SIZE   42 arch/mips/include/asm/dec/kn05.h #define KN4K_SCSI	(12*IOASIC_SLOT_SIZE)	/* ASC SCSI */
IOASIC_SLOT_SIZE   43 arch/mips/include/asm/dec/kn05.h #define KN4K_RES_13	(13*IOASIC_SLOT_SIZE)	/* unused? */
IOASIC_SLOT_SIZE   44 arch/mips/include/asm/dec/kn05.h #define KN4K_RES_14	(14*IOASIC_SLOT_SIZE)	/* unused? */
IOASIC_SLOT_SIZE   45 arch/mips/include/asm/dec/kn05.h #define KN4K_RES_15	(15*IOASIC_SLOT_SIZE)	/* unused? */