INVALIDATE_ALL_L1_TLBS 152 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); INVALIDATE_ALL_L1_TLBS 149 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); INVALIDATE_ALL_L1_TLBS 616 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c tmp = REG_SET_FIELD(0, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); INVALIDATE_ALL_L1_TLBS 844 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); INVALIDATE_ALL_L1_TLBS 181 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); INVALIDATE_ALL_L1_TLBS 135 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); INVALIDATE_ALL_L1_TLBS 215 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c INVALIDATE_ALL_L1_TLBS, 1); INVALIDATE_ALL_L1_TLBS 5459 drivers/gpu/drm/radeon/cik.c WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE); INVALIDATE_ALL_L1_TLBS 1300 drivers/gpu/drm/radeon/ni.c WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE); INVALIDATE_ALL_L1_TLBS 4311 drivers/gpu/drm/radeon/si.c WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE);