INTR_MASK 1448 drivers/gpu/drm/rockchip/rockchip_drm_vop.c active_irqs = VOP_INTR_GET_TYPE(vop, status, INTR_MASK); INTR_MASK 1701 drivers/gpu/drm/rockchip/rockchip_drm_vop.c VOP_INTR_SET_TYPE(vop, clear, INTR_MASK, 1); INTR_MASK 1702 drivers/gpu/drm/rockchip/rockchip_drm_vop.c VOP_INTR_SET_TYPE(vop, enable, INTR_MASK, 0); INTR_MASK 106 drivers/net/ethernet/cavium/thunder/nic_main.c nic_reg_write(nic, NIC_PF_MAILBOX_INT, INTR_MASK(vf_cnt)); INTR_MASK 109 drivers/net/ethernet/cavium/thunder/nic_main.c nic_reg_write(nic, NIC_PF_MAILBOX_ENA_W1S, INTR_MASK(vf_cnt)); INTR_MASK 113 drivers/net/ethernet/cavium/thunder/nic_main.c INTR_MASK(vf_cnt - 64)); INTR_MASK 115 drivers/net/ethernet/cavium/thunder/nic_main.c INTR_MASK(vf_cnt - 64)); INTR_MASK 100 drivers/net/ethernet/chelsio/cxgb3/vsc8211.c INTR_MASK); INTR_MASK 331 drivers/net/ethernet/chelsio/cxgb3/vsc8211.c cause &= INTR_MASK; INTR_MASK 1749 drivers/net/ethernet/marvell/octeontx2/af/rvu.c RVU_AF_PFAF_MBOX_INT, INTR_MASK(hw->total_pfs)); INTR_MASK 1753 drivers/net/ethernet/marvell/octeontx2/af/rvu.c INTR_MASK(hw->total_pfs) & ~1ULL); INTR_MASK 1972 drivers/net/ethernet/marvell/octeontx2/af/rvu.c INTR_MASK(rvu->hw->total_pfs) & ~1ULL); INTR_MASK 1976 drivers/net/ethernet/marvell/octeontx2/af/rvu.c INTR_MASK(rvu->hw->total_pfs) & ~1ULL); INTR_MASK 1980 drivers/net/ethernet/marvell/octeontx2/af/rvu.c INTR_MASK(rvu->hw->total_pfs) & ~1ULL); INTR_MASK 2065 drivers/net/ethernet/marvell/octeontx2/af/rvu.c RVU_AF_PFFLR_INT, INTR_MASK(rvu->hw->total_pfs)); INTR_MASK 2068 drivers/net/ethernet/marvell/octeontx2/af/rvu.c INTR_MASK(rvu->hw->total_pfs) & ~1ULL); INTR_MASK 2085 drivers/net/ethernet/marvell/octeontx2/af/rvu.c RVU_AF_PFME_INT, INTR_MASK(rvu->hw->total_pfs)); INTR_MASK 2088 drivers/net/ethernet/marvell/octeontx2/af/rvu.c INTR_MASK(rvu->hw->total_pfs) & ~1ULL); INTR_MASK 2231 drivers/net/ethernet/marvell/octeontx2/af/rvu.c rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INT_ENA_W1CX(0), INTR_MASK(vfs)); INTR_MASK 2232 drivers/net/ethernet/marvell/octeontx2/af/rvu.c rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs)); INTR_MASK 2233 drivers/net/ethernet/marvell/octeontx2/af/rvu.c rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1CX(0), INTR_MASK(vfs)); INTR_MASK 2238 drivers/net/ethernet/marvell/octeontx2/af/rvu.c INTR_MASK(vfs - 64)); INTR_MASK 2239 drivers/net/ethernet/marvell/octeontx2/af/rvu.c rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(vfs - 64)); INTR_MASK 2240 drivers/net/ethernet/marvell/octeontx2/af/rvu.c rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1CX(1), INTR_MASK(vfs - 64)); INTR_MASK 2251 drivers/net/ethernet/marvell/octeontx2/af/rvu.c rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INTX(0), INTR_MASK(vfs)); INTR_MASK 2252 drivers/net/ethernet/marvell/octeontx2/af/rvu.c rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INT_ENA_W1SX(0), INTR_MASK(vfs)); INTR_MASK 2255 drivers/net/ethernet/marvell/octeontx2/af/rvu.c rvupf_write64(rvu, RVU_PF_VFFLR_INTX(0), INTR_MASK(vfs)); INTR_MASK 2256 drivers/net/ethernet/marvell/octeontx2/af/rvu.c rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(vfs)); INTR_MASK 2257 drivers/net/ethernet/marvell/octeontx2/af/rvu.c rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1SX(0), INTR_MASK(vfs)); INTR_MASK 2263 drivers/net/ethernet/marvell/octeontx2/af/rvu.c rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INTX(1), INTR_MASK(vfs - 64)); INTR_MASK 2265 drivers/net/ethernet/marvell/octeontx2/af/rvu.c INTR_MASK(vfs - 64)); INTR_MASK 2267 drivers/net/ethernet/marvell/octeontx2/af/rvu.c rvupf_write64(rvu, RVU_PF_VFFLR_INTX(1), INTR_MASK(vfs - 64)); INTR_MASK 2268 drivers/net/ethernet/marvell/octeontx2/af/rvu.c rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(1), INTR_MASK(vfs - 64)); INTR_MASK 2269 drivers/net/ethernet/marvell/octeontx2/af/rvu.c rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1SX(1), INTR_MASK(vfs - 64)); INTR_MASK 1479 drivers/staging/qlge/qlge_dbg.c DUMP_REG(qdev, INTR_MASK); INTR_MASK 2530 drivers/staging/qlge/qlge_main.c (ql_read32(qdev, INTR_MASK) & INTR_MASK_PI)) { INTR_MASK 2538 drivers/staging/qlge/qlge_main.c ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16)); INTR_MASK 3774 drivers/staging/qlge/qlge_main.c ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI); INTR_MASK 227 drivers/staging/qlge/qlge_mpi.c ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16)); INTR_MASK 294 drivers/staging/qlge/qlge_mpi.c ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16)); INTR_MASK 540 drivers/staging/qlge/qlge_mpi.c ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16)); INTR_MASK 606 drivers/staging/qlge/qlge_mpi.c ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI); INTR_MASK 1244 drivers/staging/qlge/qlge_mpi.c ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16)); INTR_MASK 1258 drivers/staging/qlge/qlge_mpi.c ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI); INTR_MASK 643 drivers/usb/host/ehci-hcd.c ehci_writel(ehci, INTR_MASK, INTR_MASK 717 drivers/usb/host/ehci-hcd.c masked_status = status & (INTR_MASK | STS_FLR); INTR_MASK 1138 drivers/usb/host/ehci-hcd.c int mask = INTR_MASK; INTR_MASK 356 drivers/usb/host/ehci-hub.c mask = INTR_MASK; INTR_MASK 504 drivers/usb/host/ehci-hub.c ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable); INTR_MASK 5076 drivers/usb/host/fotg210-hcd.c fotg210_writel(fotg210, INTR_MASK, INTR_MASK 5140 drivers/usb/host/fotg210-hcd.c masked_status = status & (INTR_MASK | STS_FLR); INTR_MASK 2870 drivers/usb/host/oxu210hp-hcd.c status &= INTR_MASK; INTR_MASK 3165 drivers/usb/host/oxu210hp-hcd.c writel(INTR_MASK, &oxu->regs->intr_enable); /* Turn On Interrupts */ INTR_MASK 3915 drivers/usb/host/oxu210hp-hcd.c mask = INTR_MASK; INTR_MASK 4002 drivers/usb/host/oxu210hp-hcd.c writel(INTR_MASK, &oxu->regs->intr_enable);