INTR_IDX_MAX      236 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (!phys_enc || !wait_info || intr_idx >= INTR_IDX_MAX) {
INTR_IDX_MAX      311 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (!phys_enc || intr_idx >= INTR_IDX_MAX) {
INTR_IDX_MAX      237 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h 	struct dpu_encoder_irq irq[INTR_IDX_MAX];
INTR_IDX_MAX      792 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c 	for (i = 0; i < INTR_IDX_MAX; i++) {
INTR_IDX_MAX      730 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 	for (i = 0; i < INTR_IDX_MAX; i++) {