INTF_0             37 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		(p) ? (p)->intf_idx - INTF_0 : -1, \
INTF_0             43 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		(p) ? (p)->intf_idx - INTF_0 : -1, \
INTF_0            216 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		  DRMID(phys_enc->parent), phys_enc->intf_idx - INTF_0,
INTF_0           1887 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 				phys->intf_idx - INTF_0,
INTF_0             16 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c 		(e) ? (e)->base.intf_idx - INTF_0 : -1, ##__VA_ARGS__)
INTF_0             21 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c 		(e) ? (e)->base.intf_idx - INTF_0 : -1, ##__VA_ARGS__)
INTF_0            585 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c 	hw_res->intfs[phys_enc->intf_idx - INTF_0] = INTF_MODE_CMD;
INTF_0            664 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c 			  phys_enc->intf_idx - INTF_0);
INTF_0            771 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c 	DPU_DEBUG("intf %d\n", p->intf_idx - INTF_0);
INTF_0             16 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 		(e)->hw_intf->idx - INTF_0 : -1, ##__VA_ARGS__)
INTF_0             22 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 		(e)->hw_intf->idx - INTF_0 : -1, ##__VA_ARGS__)
INTF_0            428 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 			  phys_enc->hw_intf->idx - INTF_0, ret, enable,
INTF_0            487 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 	hw_res->intfs[phys_enc->intf_idx - INTF_0] = INTF_MODE_VIDEO;
INTF_0            614 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 				  phys_enc->hw_intf->idx - INTF_0, ret);
INTF_0            632 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 				    phys_enc->hw_intf->idx - INTF_0);
INTF_0            649 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 			    phys_enc->hw_intf->idx - INTF_0,
INTF_0            287 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c 	INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0),
INTF_0            207 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c 	case INTF_0:
INTF_0            301 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c 	{ DPU_IRQ_TYPE_INTF_UNDER_RUN, INTF_0, DPU_INTR_INTF_0_UNDERRUN, 0},
INTF_0            302 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c 	{ DPU_IRQ_TYPE_INTF_VSYNC, INTF_0, DPU_INTR_INTF_0_VSYNC, 0},
INTF_0            424 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c 	{ DPU_IRQ_TYPE_SFI_VIDEO_IN, INTF_0,
INTF_0            426 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c 	{ DPU_IRQ_TYPE_SFI_VIDEO_OUT, INTF_0,
INTF_0            428 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c 	{ DPU_IRQ_TYPE_SFI_CMD_0_IN, INTF_0,
INTF_0            430 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c 	{ DPU_IRQ_TYPE_SFI_CMD_0_OUT, INTF_0,
INTF_0            433 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c 	{ DPU_IRQ_TYPE_SFI_CMD_1_IN, INTF_0,
INTF_0            435 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c 	{ DPU_IRQ_TYPE_SFI_CMD_1_OUT, INTF_0,
INTF_0            437 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c 	{ DPU_IRQ_TYPE_SFI_CMD_2_IN, INTF_0,
INTF_0            439 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c 	{ DPU_IRQ_TYPE_SFI_CMD_2_OUT, INTF_0,
INTF_0            442 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c 	{ DPU_IRQ_TYPE_PROG_LINE, INTF_0, DPU_INTR_PROG_LINE, 3},
INTF_0            525 drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c 		id = i + INTF_0;